Paper ID: 2302.08324

A Bit-Parallel Deterministic Stochastic Multiplier

Sairam Sri Vatsavai, Ishan Thakkar

This paper presents a novel bit-parallel deterministic stochastic multiplier, which improves the area-energy-latency product by up to 10.6$\times$10$^4$, while improving the computational error by 32.2\%, compared to three prior stochastic multipliers.

Submitted: Feb 14, 2023