FPGA Resource

FPGA resource optimization for deep learning inference focuses on efficiently deploying complex models like Transformers and Vision Transformers onto resource-constrained hardware. Current research emphasizes techniques such as mixed-precision quantization, novel approximations of computationally expensive non-linear functions (e.g., softmax, GELU), and the development of composable architectures for ensemble methods to maximize resource utilization and throughput. These advancements enable the deployment of sophisticated machine learning models on embedded devices for applications ranging from anomaly detection and time-series forecasting to spacecraft pose estimation, significantly improving performance and energy efficiency compared to CPU-based implementations.

Papers

November 6, 2024

Increasing the scalability of graph convolution for FPGA-implemented event-based vision
Piotr Wzorek, Kamil Jeziorek, Tomasz Kryjak, Andrea Pinna
Event Camera Potential Scalability Graph Convolution Graph Convolutional Neural Network Event Based Vision Frame Based FPGA Resource

October 4, 2024

Resource-aware Mixed-precision Quantization for Enhancing Deployability of Transformers for Time-series Forecasting on Embedded FPGAs
Tianheng Ling, Chao Qian, Gregor Schiele
Transformer Megatron Decepticons Time Series Forecasting Field Programmable Gate Array Mixed Precision Quantization Uncertainty Aware Deployment FPGA Resource Heterogeneous Quantization

June 21, 2024

PEANO-ViT: Power-Efficient Approximations of Non-Linearities in Vision Transformers
Mohammad Erfan Sadeghi, Arash Fayyazi, Seyedarmin Azizi, Massoud Pedram
Vision Transformer Field Programmable Gate Array Layer Normalization Divide and Conquer Approximation Power Non Linearity FPGA Resource

June 10, 2024

fSEAD: a Composable FPGA-based Streaming Ensemble Anomaly Detection Library
Binglei Lou, David Boland, Philip H. W. Leong
Anomaly Detection State of the Art Anomaly FPGA Resource Streaming Capable High Performance Architecture

June 6, 2024

Real-Time Spacecraft Pose Estimation Using Mixed-Precision Quantized Neural Network on COTS Reconfigurable MPSoC
Julien Posso, Guy Bois, Yvon Savaria
Neural Network Field Programmable Gate Array Multi FPGA FPGA Resource Spacecraft Pose Estimation

March 15, 2024

AutoHLS: Learning to Accelerate Design Space Exploration for HLS Designs
Md Rubel Ahmed, Toshiaki Koike-Akino, Kieran Parsons, Ye Wang
Bayesian Optimization Design Space Exploration High Level Synthesis FPGA Resource

January 5, 2024

A Cost-Efficient FPGA Implementation of Tiny Transformer Model using Neural ODE
Ikumi Okubo, Keisuke Sugiura, Hiroki Matsutani
Neural ODE Lightweight Model Lightweight Transformer Tiny Transformer FPGA Implementation FPGA Resource

October 4, 2023

September 15, 2023

A Precision-Scalable RISC-V DNN Processor with On-Device Learning Capability at the Extreme Edge
Longwei Huang, Chao Fang, Qiong Li, Jun Lin, Zhongfeng Wang
Extreme Edge Device Learning FPGA Resource Edge Platform

January 22, 2023

Resource-constrained FPGA Design for Satellite Component Feature Extraction
Andrew Ekblad, Trupti Mahendrakar, Ryan T. White, Markus Wilde, Isaac Silver, Brooke Wheeler
Computer Vision Field Programmable Gate Array FPGA Resource Based Object

FPGA Resource

Papers

Increasing the scalability of graph convolution for FPGA-implemented event-based vision

Resource-aware Mixed-precision Quantization for Enhancing Deployability of Transformers for Time-series Forecasting on Embedded FPGAs

PEANO-ViT: Power-Efficient Approximations of Non-Linearities in Vision Transformers

fSEAD: a Composable FPGA-based Streaming Ensemble Anomaly Detection Library

Real-Time Spacecraft Pose Estimation Using Mixed-Precision Quantized Neural Network on COTS Reconfigurable MPSoC

AutoHLS: Learning to Accelerate Design Space Exploration for HLS Designs

A Cost-Efficient FPGA Implementation of Tiny Transformer Model using Neural ODE

Enhancing Energy-efficiency by Solving the Throughput Bottleneck of LSTM Cells for Embedded FPGAs

A Study of Quantisation-aware Training on Time Series Transformer Models for Resource-constrained FPGAs

A Precision-Scalable RISC-V DNN Processor with On-Device Learning Capability at the Extreme Edge

Resource-constrained FPGA Design for Satellite Component Feature Extraction