Hardware Accelerator
Hardware accelerators are specialized computing devices designed to significantly speed up and improve the energy efficiency of computationally intensive tasks, particularly in machine learning. Current research focuses on accelerating specific model architectures like transformers and convolutional neural networks (CNNs), often employing techniques such as quantization, pruning, and novel dataflow designs implemented on FPGAs and other platforms. This work is driven by the need to deploy increasingly complex AI models on resource-constrained devices (edge computing) and to improve the sustainability of large-scale AI deployments by reducing energy consumption. The resulting advancements have significant implications for various fields, including computer vision, natural language processing, and robotics, enabling faster and more efficient AI applications.
Papers
FAMOUS: Flexible Accelerator for the Attention Mechanism of Transformer on UltraScale+ FPGAs
Ehsan Kabir, Md. Arafat Kabir, Austin R.J. Downey, Jason D. Bakos, David Andrews, Miaoqing Huang
ProTEA: Programmable Transformer Encoder Acceleration on FPGA
Ehsan Kabir, Jason D. Bakos, David Andrews, Miaoqing Huang
LLM-Aided Compilation for Tensor Accelerators
Charles Hong, Sahil Bhatia, Altan Haan, Shengjun Kris Dong, Dima Nikiforov, Alvin Cheung, Yakun Sophia Shao
HeTraX: Energy Efficient 3D Heterogeneous Manycore Architecture for Transformer Acceleration
Pratyush Dhingra, Janardhan Rao Doppa, Partha Pratim Pande