Multi FPGA

Multi-FPGA systems are emerging as powerful accelerators for computationally intensive tasks, particularly in deep learning and related fields. Current research focuses on optimizing the implementation of various neural network architectures, including transformers (like LLMs), convolutional neural networks (CNNs), and graph neural networks (GNNs), across multiple FPGAs to achieve high throughput and energy efficiency. This approach offers significant advantages in resource-constrained environments like edge devices and embedded systems, impacting areas such as robotics, autonomous vehicles, and high-energy physics by enabling real-time processing of complex data streams. The development of efficient communication strategies and hardware-software co-design methodologies are key challenges driving ongoing research.

Papers

October 25, 2024

Hierarchical Mixture of Experts: Generalizable Learning for High-Level Synthesis
Weikai Li, Ding Wang, Zijian Ding, Atefeh Sohrabizadeh, Zongyue Qin, Jason Cong, Yizhou Sun
Expert Knowledge Field Programmable Gate Array Critical Synthesis High Level High Level Synthesis Multi FPGA Learning Generalizable Hierarchical Mixture MoE FFD

August 1, 2024

Designing Efficient LLM Accelerators for Edge Devices
Jude Haris, Rappy Saha, Wenhao Hu, José Cano
Edge Device Multi FPGA FPGA Accelerator Lightweight LLM Hardware Constraint

July 1, 2024

Exploring FPGA designs for MX and beyond
Ebby Samson, Naveen Mellempudi, Wayne Luk, George A. Constantinides
Field Programmable Gate Array Pytorch Model Low Precision Multi FPGA

June 28, 2024

Idle is the New Sleep: Configuration-Aware Alternative to Powering Off FPGA-Based DL Accelerators During Inactivity
Chao Qian, Christopher Cichiwskyj, Tianheng Ling, Gregor Schiele
Generating User Activity DNN Accelerator Multi FPGA Deep Learning Accelerator Sustainable Computing Action on the Fly

June 6, 2024

Real-Time Spacecraft Pose Estimation Using Mixed-Precision Quantized Neural Network on COTS Reconfigurable MPSoC
Julien Posso, Guy Bois, Yvon Savaria
Neural Network Field Programmable Gate Array Multi FPGA Spacecraft Pose Estimation FPGA Resource

April 29, 2024

HLSTransform: Energy-Efficient Llama 2 Inference on FPGAs Via High Level Synthesis
Andy He, Darren Key, Mason Bulling, Andrew Chang, Skyler Shapiro, Everett Lee
Scientific Inference Field Programmable Gate Array Hardware Accelerator Multi FPGA FPGA Accelerator Fine Tuned Llama

April 26, 2024

Embedded FPGA Developments in 130nm and 28nm CMOS for Machine Learning in Particle Detector Readout
Julia Gonski, Aseem Gupta, Haoyi Jia, Hyunjoon Kim, Lorenzo Rota, Larry Ruckman, Angelo Dragone, Ryan Herbst
Machine Learning Field Programmable Gate Array Multi FPGA Complementary Metal Oxide Semiconductor FPGA Implementation Particle Detector Readout Head

April 24, 2024

The Feasibility of Implementing Large-Scale Transformers on Multi-FPGA Platforms
Yu Gao, Juan Camilo Vega, Paul Chow
Task Feasibility Multi FPGA Large Scale Transformer

February 2, 2024

FPGA Deployment of LFADS for Real-time Neuroscience Experiments
Xiaohan Liu, ChiJui Chen, YanLun Huang, LingChi Yang, Elham E Khoda, Yihui Chen, Scott Hauck, Shih-Chieh Hsu, Bo-Cheng Lai
Inference Latency Latent Dynamic High Throughput Neural Dynamic Multi FPGA

January 19, 2024

A Lightweight Multi-Attack CAN Intrusion Detection System on Hybrid FPGAs
Shashwat Khandelwal, Shreejith Shanker
Deep Learning Intrusion Detection Intrusion Detection System Vehicle Interaction Vehicular Network Multi FPGA

December 18, 2023

ACCL+: an FPGA-Based Collective Engine for Distributed Applications
Zhenhao He, Dario Korolija, Yu Zhu, Benjamin Ramhorst, Tristan Laan, Lucian Petrica, Michaela Blott, Gustavo Alonso
Field Programmable Gate Array Task Offloading Multi FPGA Collective Motion Collective Communication

August 7, 2023

Imbalanced Large Graph Learning Framework for FPGA Logic Elements Packing Prediction
Zhixiong Di, Runzhe Tao, Lin Chen, Qiang Wu, Yibo Lin
Graph Learning Large Scale Graph Multi FPGA Circuit Representation

June 22, 2023

Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms
Christian Lienen, Alexander Philipp Nowosad, Marco Platzner
Financial Application Area MaPPing Robot Operating System Ro Package Multi FPGA System on Chip Compute Node Hardware Platform Communication Optimization

June 1, 2023

An FPGA Architecture for Online Learning using the Tsetlin Machine
Samuel Prescott, Adrian Wheeldon, Rishad Shafik, Tousif Rahman, Alex Yakovlev, Ole-Christoffer Granmo
Machine Learning Model Online Learning Field Programmable Gate Array Edge Device Learning Algorithm Multi FPGA Tsetlin Machine

May 31, 2023

fpgaHART: A toolflow for throughput-oriented acceleration of 3D CNNs for HAR onto FPGAs
Petros Toupas, Christos-Savvas Bouganis, Dimitrios Tzovaras
Field Programmable Gate Array Human Action Recognition 3d CNN 3D Convolutional Multi FPGA

May 24, 2023

Reconfigurable Distributed FPGA Cluster Design for Deep Learning Accelerators
Hans Johnson, Tianyang Fang, Alejandro Perez-Vicente, Jafar Saniie
Deep Learning Field Programmable Gate Array Multi FPGA Deep Learning Workload Deep Learning Accelerator

May 9, 2023

DeepFire2: A Convolutional Spiking Neural Network Accelerator on FPGAs
Myat Thu Linn Aung, Daniel Gerlinghoff, Chuping Qu, Liwei Yang, Tian Huang, Rick Siow Mong Goh, Tao Luo, Weng-Fai Wong
Neural Network Field Programmable Gate Array Hardware Design Multi FPGA Network Layer

April 13, 2023

End-to-end codesign of Hessian-aware quantized neural networks for FPGAs and ASICs
Javier Campos, Zhen Dong, Javier Duarte, Amir Gholami, Michael W. Mahoney, Jovan Mitrevski, Nhan Tran
Neural Network Field Programmable Gate Array Hessian Matrix Efficient Neural Network Multi FPGA Open Neural Network Exchange

February 8, 2023

A FPGA-based architecture for real-time cluster finding in the LHCb silicon pixel detector
G. Bassi, L. Giambastiani, K. Hennessy, F. Lazzari, M. J. Morello, T. Pajero, A. Fernandez Prieto, G. Punzi
Cluster Analysis Multi FPGA Track Reconstruction Pixel Vertex Detector VHDL Code LHCb Experiment

October 19, 2022

Gradient Backpropagation based Feature Attribution to Enable Explainable-AI on the Edge
Ashwin Bhat, Adou Sangbone Assoa, Arijit Raychowdhury
Extreme Edge XAI Method Feature Attribution Multi FPGA Inference Accelerator Gradient Backpropagation

Multi FPGA

Papers

Hierarchical Mixture of Experts: Generalizable Learning for High-Level Synthesis

Designing Efficient LLM Accelerators for Edge Devices

Exploring FPGA designs for MX and beyond

Idle is the New Sleep: Configuration-Aware Alternative to Powering Off FPGA-Based DL Accelerators During Inactivity

Real-Time Spacecraft Pose Estimation Using Mixed-Precision Quantized Neural Network on COTS Reconfigurable MPSoC

HLSTransform: Energy-Efficient Llama 2 Inference on FPGAs Via High Level Synthesis

Embedded FPGA Developments in 130nm and 28nm CMOS for Machine Learning in Particle Detector Readout

The Feasibility of Implementing Large-Scale Transformers on Multi-FPGA Platforms

FPGA Deployment of LFADS for Real-time Neuroscience Experiments

A Lightweight Multi-Attack CAN Intrusion Detection System on Hybrid FPGAs

ACCL+: an FPGA-Based Collective Engine for Distributed Applications

Imbalanced Large Graph Learning Framework for FPGA Logic Elements Packing Prediction

Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms

An FPGA Architecture for Online Learning using the Tsetlin Machine

fpgaHART: A toolflow for throughput-oriented acceleration of 3D CNNs for HAR onto FPGAs

Reconfigurable Distributed FPGA Cluster Design for Deep Learning Accelerators

DeepFire2: A Convolutional Spiking Neural Network Accelerator on FPGAs

End-to-end codesign of Hessian-aware quantized neural networks for FPGAs and ASICs

A FPGA-based architecture for real-time cluster finding in the LHCb silicon pixel detector

Gradient Backpropagation based Feature Attribution to Enable Explainable-AI on the Edge