SoC FPGA

System-on-Chip Field-Programmable Gate Arrays (SoC FPGAs) are increasingly used to accelerate machine learning inference for resource-constrained edge applications, primarily focusing on improving real-time performance and energy efficiency. Current research emphasizes deploying various neural network architectures, including convolutional neural networks (CNNs), graph convolutional networks (GCNs), and Tsetlin Machines, onto these platforms for tasks like object detection, classification, and segmentation in areas such as autonomous driving and robotics. This work is significant because it enables the deployment of sophisticated AI algorithms in power-sensitive embedded systems, leading to advancements in areas like computer vision and real-time control.

Papers

October 7, 2024

Hardware-Software Co-optimised Fast and Accurate Deep Reconfigurable Spiking Inference Accelerator Architecture Design Methodology
Anagha Nimbekar, Prabodh Katti, Chen Li, Bashir M. Al-Hashimi, Amit Acharyya, Bipin Rajendran
Spiking Neural Network Hardware Accelerator Complementary Metal Oxide Semiconductor SoC FPGA

June 11, 2024

Embedded Graph Convolutional Networks for Real-Time Event Data Processing on SoC FPGAs
Kamil Jeziorek, Piotr Wzorek, Krzysztof Blachut, Andrea Pinna, Tomasz Kryjak
Event Camera Graph Convolutional Network Graph Convolutional Neural Network GCN Based SoC FPGA

April 30, 2024

PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC
Lucas Grativol Ribeiro, Lubin Gauthier, Mathieu Leonardon, Jérémy Morlier, Antoine Lavrard-Meyer, Guillaume Muller, Virginie Fresse, Matthieu Arzel
LeArning Abstract Shot Learning DNN Framework Low Latency Embedded System SoC FPGA

March 3, 2024

MATADOR: Automated System-on-Chip Tsetlin Machine Design Generation for Edge Applications
Tousif Rahman, Gang Mao, Sidharth Maheshwari, Rishad Shafik, Alex Yakovlev
Field Programmable Gate Array Hardware Aware Edge Application SoC FPGA

October 12, 2023

Performance/power assessment of CNN packages on embedded automotive platforms
Paolo Burgio, Gianluca Brilli
Autonomous Driving System Performance Edge Computing Accelerator Architecture Power Prediction SoC FPGA

July 26, 2023

High-definition event frame generation using SoC FPGA devices
Krzysztof Blachut, Tomasz Kryjak
Event Stream Vision Algorithm SoC FPGA Event Frame Event Based Video Frame Interpolation

July 17, 2023

Implementation of a perception system for autonomous vehicles using a detection-segmentation network in SoC FPGA
Maciej Baczmanski, Mateusz Wasala, Tomasz Kryjak
Autonomous Vehicle Image Segmentation Practical Implementation Segmentation Network Perception System SoC FPGA

September 30, 2022

Energy Efficient Hardware Acceleration of Neural Networks with Power-of-Two Quantisation
Dominika Przewlocka-Rus, Tomasz Kryjak
Neural Network Deep Neural Network Hardware Acceleration Neural Network Accelerator SoC FPGA Multiplicative Neural Network Power of Two Quantization

July 25, 2022

Hardware-in-the-loop simulation of a UAV autonomous landing algorithm implemented in SoC FPGA
Hubert Szolc, Tomasz Kryjak
Autonomous Landing Hardware in the Loop SoC FPGA

July 2, 2022

Hardware architecture for high throughput event visual data filtering with matrix of IIR filters algorithm
Marcin Kowalczyk, Tomasz Kryjak
Field Programmable Gate Array Perception System High Throughput Hardware Design Terminator Economy Neuromorphic Vision SoC FPGA

April 22, 2022

Real-time HOG+SVM based object detection using SoC FPGA for a UHD video stream
Mateusz Wasala, Tomasz Kryjak
Deep Convolutional Neural Network Pedestrian Detection High Resolution Video SoC FPGA Pedestrian Detector Video Surveillance System

SoC FPGA

Papers

Hardware-Software Co-optimised Fast and Accurate Deep Reconfigurable Spiking Inference Accelerator Architecture Design Methodology

Embedded Graph Convolutional Networks for Real-Time Event Data Processing on SoC FPGAs

PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC

MATADOR: Automated System-on-Chip Tsetlin Machine Design Generation for Edge Applications

Performance/power assessment of CNN packages on embedded automotive platforms

High-definition event frame generation using SoC FPGA devices

Implementation of a perception system for autonomous vehicles using a detection-segmentation network in SoC FPGA

Energy Efficient Hardware Acceleration of Neural Networks with Power-of-Two Quantisation

Hardware-in-the-loop simulation of a UAV autonomous landing algorithm implemented in SoC FPGA

Hardware architecture for high throughput event visual data filtering with matrix of IIR filters algorithm

Real-time HOG+SVM based object detection using SoC FPGA for a UHD video stream