Privacy-preserving inference via Torus Fully Homomorphic Encryption (TFHE) provides strong protection for sensitive data in outsourced deep learning applications. However, most TFHE-compatible neural network frameworks remain based on arithmetic neural architectures, resulting in high inference latency due to programmable bootstrapping (PBS), accumulator growth, and circuit bit-width sensitivity. In this work, we investigate Deep Differentiable Logic Gate Networks (DDLGNs) as a Boolean-native alternative for encrypted inference under TFHE. Because DDLGNs learn Boolean computations directly and discretize into fixed logic gate networks, their inference procedure is naturally aligned with TFHE's Boolean execution model and avoids arithmetic accumulation in hidden layers. We present EI-DDLGN, the first in-depth study of TFHE-based DDLGN inference, and characterize how encrypted execution cost depends on model size, learned Boolean-function distribution, and propagated wire status. We also introduce Model-Fixed-Wire PBS Bypass (MFW-PBS Bypass), a semantics-preserving execution strategy that eliminates unnecessary PBS operations without modifying the learned network topology. Evaluations across 72 depth-width configurations on MNIST, FashionMNIST, and UCI Phishing show that DDLGNs constitute an efficient alternative to arithmetic TFHE inference, achieving substantially improved accuracy-latency trade-offs. Notably, on MNIST, EI-DDLGN-Small matches the accuracy of QAT-FCNN-4 while reducing encrypted inference latency by 13.4x. Our implementation is available at https://github.com/Carleton-SCI/EI-DDLGN
Figures & tables
Model family
What the neuron represents
Main TFHE implication
QAT-FCNN
Quantized weighted neuron; the arithmetic NN is preserved after QAT
Cost depends on circuit bit-width, accumulator growth, and PBS count
BNNs
Binary weighted neuron; Boolean logic mainly approximates arithmetic/dot-product computation but still relies on accumulation operations
Still weight-based; requires deep adder trees and high bootstrapping cost.
DDLGNs
Learned two-input logic gate; the perceptron is redefined as one learned logic operation
Boolean-native network; cost follows learned functions and executed PBS count
Table 1: Comparison between QAT-FCNN [ 17 ] , BNNs [ 8 ] , and DDLGNs [ 15 ] for encrypted inference.
Figure 1: Logic gate network inference with binary activations propagated through learned Boolean gates.
Figure 2: Server-side EI-DDLGN model preparation: training, discretization, export, and TFHE Boolean backend construction.
Figure 3: Client–server EI-DDLGN inference under TFHE: the client encrypts inputs and decrypts predictions, while the server evaluates encrypted logic gates.
Gate f(a,b)
f(0,x)
f(1,x)
f(x,0)
f(x,1)
a∧b
0
x
0
x
a∨b
x
1
x
1
a⊕b
x
¬x
x
¬x
¬(a⊕b)
¬x
x
¬x
x
¬(a∧b)
1
¬x
1
¬x
¬(a∨b)
¬x
0
¬x
0
Table 2: TFHE action selected when one input to a PBS-requiring Boolean function is model-fixed. Here, x denotes the remaining encrypted input, while 0 and 1 denote model-fixed outputs.
Model
Dataset
Acc. (%)
ρfixed (%)
ρPBSbase (%)
ρPBSexec (%)
βPBS (%)
EI-DDLGN (Small) (2×4K)τ=3
MNIST
91.55
4.59
65.22
61.58
5.60
FashionMNIST
77.49
4.99
63.96
61.00
4.63
UCI Phishing
92.40
9.85
64.45
59.30
7.99
EI-DDLGN (Medium) (4×6K)τ=5
MNIST
95.87
2.69
63.58
60.44
4.94
FashionMNIST
81.27
2.15
61.03
58.91
3.48
UCI Phishing
93.93
9.38
58.83
48.08
18.27
Table 3: PBS characteristics of representative EI-DDLGN models.
Figure 4: ρPBSexec across the EI-DDLGN depth–width grid under MFW-PBS Bypass. Each panel corresponds to one dataset.
Figure 5: Distribution of the PBS bypass rate βPBS across the analyzed EI-DDLGN models.
Figure 6: Accuracy versus executed PBS count for the EI-DDLGN model grid.
Figure 7: Best accuracy achievable under an EI-DDLGN executed PBS budget.
Parameter
Symbol
Value
LWE dimension
n
739
Ciphertext modulus
q
232
LWE noise standard deviation
σLWE
5.862×10−6
Estimated security level
–
132 bits
Table 4: TFHE parameters used in the encrypted experiments.
Figure 8: EI-DDLGN encrypted evaluation time as a function of width, grouped by depth and dataset.
Model
Size / active conn.
Acc. (%)
Time/img (s)
Circuit bit-width
EI-DDLGN Small
2 layers, 4K width
91.55
6.58
N/A
EI-DDLGN Medium
4 layers, 6K width
95.87
19.33
N/A
EI-DDLGN Large
6 layers, 8K width
97.20
34.14
N/A
QAT-FCNN-4
56 active conn.
91.54
88.24
6-bit: 50%, 7-bit: 50%
QAT-FCNN-6
84 active conn.
92.25
126.97
6-bit: 10%, 7-bit: 90%
QAT-FCNN-8
112 active conn.
92.45
136.68
7-bit: 100%
Table 5: Compact MNIST comparison between EI-DDLGN and reproduced QAT-FCNN arithmetic TFHE baselines. Results are averaged over 10 independent seeds.
Privacy-preserving machine learning (PPML) has become increasingly important in applications where sensitive data must remain confidential. Homomorphic Encryption (HE) enables computation directly on encrypted data, allowing neural network inference without revealing raw inputs. While prior works have largely focused on inference over a single encrypted image, batch processing of encrypted inputs lags behind, despite being critical for high-throughput inference scenarios and training-oriented workloads. In this work, we address this gap by developing optimized algorithms for batched HE-friendly neural networks. We also introduced a pipeline architecture designed to maximize resource efficiency for different batch size execution. We implemented these algorithms and evaluated our work using HE-friendly ResNet-20 and ResNet-34 models on encrypted CIFAR-10 and CIFAR-100 datasets, respectively. For ResNet-20, our approach achieves an amortized inference time of 8.86 seconds per image when processing a batch of 512 encrypted images, with a peak memory usage of 98.96 GB. These results represent a 1.78x runtime improvement and a 3.74x reduction in memory usage compared to the state-of-the-art design. For the deeper ResNet-34 model, we achieve an amortized inference time of 28.14 on a batch of 256 encrypted images using 246.78GB of RAM
Nges Brian Njungle, Eric Jahns, Michel A. Kinsy
STAM Center, Ira A. Fulton Schools of Engineering · Arizona State University, Tempe, AZ 85281, USA
Fully homomorphic encryption (FHE) enables neural network inference directly on encrypted inputs, but it remains orders of magnitude slower than plaintext in- ference. Applying the server's plaintext weights to encrypted activations involves plaintext-ciphertext multiplications (PMult) and accounts for more than half of inference time in recent systems. Ternary quantization can replace these multipli- cations with additions and subtractions, but the savings rarely materialize under packed execution. A single PMult applies a weight group fixed by the packing layout and can be avoided only when all its weights share the same ternary value. Ternarizing all groups, however, largely degrades accuracy. We present FIONA, an offline optimizer that selectively ternarizes weights within a given packing layout based on the estimated effect of ternary conversion on the model's performance. FIONA encourages a shared ternary value within each weight group and retains full-precision weights for sensitive groups, so ternar- ized and full-precision paths coexist within a layer. It then compiles these hybrid operators exactly, applying common scaling factors once to accumulated inputs and reusing sums across outputs. Weight ternarization can also narrow the input ranges of downstream polynomials. FIONA fits lower-degree replacements under a cumulative accuracy budget, reducing multiplicative depth and bootstrapping. On VGG11, ViT, and BERT, FIONA reduces PMult operations by 53.4-79.5% and accelerates end-to-end encrypted inference by 2.38x, 1.68x, and 1.84x, re- spectively, with less than 1% accuracy loss across all three models.
Yiteng Peng, Zhibo Liu, Dongwei Xiao +1
The Hong Kong University of Science and Technology · State Key Laboratory of Novel Software Technology, Nanjing University
Fully homomorphic encryption (FHE) enables computation on encrypted data, but practical encrypted Transformer inference is bottlenecked by the sequential composition of many nonlinear blocks. We study whether Structured Newton Layer Parallelism (SNLP) can make this inter-layer composition more FHE-friendly: each Transformer block still requires polynomial approximations for operations such as softmax and RMSNorm, but SNLP reduces the layerwise sequential nonlinear depth from L stages to a small number of solver iterations plus linear structured corrections. Using a simulation framework based on Chebyshev polynomial approximations, we measure error accumulation under sequential versus SNLP inference across 8 models and 4 architecture families. On a 0.5B IDN-trained model, SNLP reduces symbolic bootstraps from 53 to 20 (2.65x) with only +1.2% perplexity degradation, while lowering error amplification (1.36x vs. 1.42x). Across all tested models, SNLP has lower amplification than sequential inference. Ablations show that softmax approximation dominates the error budget and CKKS arithmetic noise is negligible in our setting, suggesting that SNLP is complementary to block-level FHE-friendly operator design rather than a replacement for it.
Ligong Han, Kai Xu, Hao Wang +3
MBZUAI IFM · Red Hat AI Innovation · MIT-IBM Watson AI Lab +3