Format-Aware Fusion for Fast FP4 Pretraining
Organizations: GRAPHCORE RESEARCH
Abstract
Four-bit floating-point (FP4) Tensor Cores accelerate matrix multiplication, but scale computation, operand packing, layout construction, and saved backward state can erase the gain. We present format-aware fusion, which co-designs each quantization producer with its scale domain and consumer layout for native \mxfp{}, global \nvfp{}, and cooperative-thread-array-local \nvfp{}. We evaluate Llama-3-family 8B pretraining through 160 billion tokens using bfloat16 output projections and compiled cross entropy. In matched same-accelerator probes, bfloat16 and Transformer Engine \nvfp{} reach 18.8K and 27.6K tokens/s/GPU, while our fastest custom route reaches 37.9K. \mxfp{} with row-gradient stochastic rounding and fixed-sign 32-value Hadamard weight-gradient preconditioning reaches 37.2K tokens/s/GPU (86.3% bfloat16 model FLOP utilization) and ends 2.11% above the raw bfloat16 training-loss endpoint. A Transformer Engine recipe with four final bfloat16 blocks ends 0.87% above bfloat16 at 27.1K tokens/s/GPU. Downstream rankings differ from training-loss rankings, showing that FP4 outcomes depend jointly on scale contract, operand, and execution path.
Figures & tables
| Component | Existing method | Implementation in this work |
|---|---|---|
| MXFP4 scale policy | E8M0 forces the block scale to a power of two. Rounding the exponent up keeps the block maximum within the largest finite E2M1 magnitude, 6; rounding it down halves the decoded grid spacing while clamping the upper tail to that endpoint [ 33 , 9 ] | Scale direction is explicit and operand-specific. Activations and gradients use upward, encode-centric scales; 2D32 weights admit the next finer scale only under the fixed tile-maximum test. Fused producers implement both rules |
| CTA-local outer scaling | NVFP4 uses one tensor-level FP32 outer scale together with an E4M3 scale for each 16 values [ 33 , 29 ] | We factor the outer correction into FP32 row- and column-tile factors that remain fixed along K. Their product is applied after the full Tensor Core accumulation, replacing the tensor-wide maximum-magnitude reduction with tile-local scale completion |
| 2D weight contract | NVFP4 uses orientation-consistent 2D16 weights, and existing MXFP4 systems describe transpose-consistent 2D32 weights [ 29 , 31 , 36 , 9 ] | Pure-format and depth-wise routes preserve one weight encoding across Fprop and Dgrad. Custom global NVFP4 returns both packed views under one 2D16 encoding; MXFP4 and CTA-local fused producers quantize once and emit both layouts. The operand hybrid instead emits distinct encodings from the same BF16 tile |
| Stochastic-rounding placement | Chmiel et al. use adjacent-bin stochastic rounding in Dgrad and on both Wgrad operands; NVIDIA applies gradient SR to both Dgrad and Wgrad [ 8 , 29 ] | One producer creates two consumer-specific representations: a stochastically rounded row-facing operand for Dgrad and a deterministic column-facing representation for Wgrad |
| Wgrad preconditioning | Existing FP4 recipes use paired randomized or deterministic Hadamard transforms [ 44 , 29 , 9 ] | In signed-Hadamard routes, fixed-sign H16/H32 reuses the fixed 16-entry sign pattern from the pinned TE implementation; the plain-H16 hybrid uses no sign flips. Each acts only on paired Wgrad representations and is fused with column quantization. Dgrad and the stored weight are unchanged |
| Format-aware fusion | IO-aware fusion and the underlying MXFP4/NVFP4 scale formats are documented in earlier systems [ 33 , 29 , 11 , 20 ] | The fusion boundary is set by when the required scale becomes available. Query/key/value, rotary-position, and gated feed-forward stages produce packed layouts and saved backward tensors together; custom global NVFP4 overlaps tensor amax while CTA-local removes that dependency |
| Route | Block | Scale metadata | Main systems consequence |
|---|---|---|---|
| MXFP4 | 32 | E8M0 block scale | Local reduction; coarse power-of-two grid |
| Custom global NVFP4 | 16 | E4M3 block + FP32 tensor | Requires the completed tensor amax |
| CTA-local NVFP4 | 16 | E4M3 block + two FP32 tile-outer scales | Tile-local production; two-sided metadata |
| Field | Effective contract |
|---|---|
| Model | 32 blocks; width 4,096; FFN 14,336; 32 Q heads; 8 KV heads; head dimension 128; vocabulary 128,256 |
| Position / norm | Llama-3.1 RoPE with base , scaling, low/high frequency factors 1 and 4, and original length 8,192; RMSNorm |
| Data / tokenizer | Shuffled OLMo Mix 1124 [ 43 ] ; Meta-Llama-3.1-8B tokenizer |
| Optimizer | Fused AdamW, , , weight decay 0.1, global gradient-norm clip 1.0 |
| LR schedule | 2,000-step linear warmup to ; constant thereafter over the reported horizon |
| Batch / horizon | Global batch 512; 4,194,304 tokens/update; 38,147 updates; 160,000,114,688 scheduled tokens |
| Route | Body assignment | Fprop | Dgrad | Wgrad | Weight representation(s) |
|---|---|---|---|---|---|
| BF16 | blocks 1–32 | BF16 | BF16 | BF16 | BF16 master |
| TE-native NVFP4 in all blocks | blocks 1–32 | global NV | global NV | global NV + TE-managed H16 | TE 2D16 |
| TE NVFP4 with four final BF16 blocks | NV blocks 1–28; BF16 29–32 | NV 1–28; BF16 29–32 | NV 1–28; BF16 29–32 | NV+TE-managed H16 1–28; BF16 29–32 | TE 2D16 / BF16 |
| Custom global NVFP4 | blocks 1–32 | global NV | global NV | global NV | custom 2D16 |
| MXFP4 + row-SR | blocks 1–32 | MX | MX | MX | custom 2D32 |
| CTA-local NVFP4 | blocks 1–32 | localCTA | localCTA | localCTA | custom 2D16 |
| Route | Gradient rounding | Wgrad preconditioning | BF16 body blocks / output head |
|---|---|---|---|
| BF16 | n/a | none | all / BF16 |
| TE-native NVFP4 in all blocks | TE gradient SR | TE-managed H16 on Wgrad | none / BF16 |
| TE NVFP4 + four final BF16 blocks | TE gradient SR | TE-managed H16 on NV Wgrad | last four / BF16 |
| Custom global NVFP4 | row data SR | none | none / BF16 |
| MXFP4 + row-SR | row data SR | none | none / BF16 |
| CTA-local NVFP4 | row data SR | none | none / BF16 |
| Route | Raw endpoint loss | Loss excess vs BF16 |
|---|---|---|
| BF16 | 2.364637 | 0.00% |
| TE NVFP4 + four final BF16 blocks | 2.385181 | 0.87% |
| TE-native NVFP4 | 2.396353 | 1.34% |
| MXFP4 + row-SR + fixed H32 | 2.414578 | 2.11% |
| CTA-local NVFP4 | 2.417708 | 2.24% |
| Custom global NVFP4 | 2.428200 | 2.69% |
Appendix figures & tables2 assets
Supplementary material from the paper’s appendix.
Appendix
| Route | LB/GA | Tokens/s/GPU | BF16 MFU | HBM/GPU |
|---|---|---|---|---|
| MXFP4 + row-SR | 4/4 | 39,306.59 | 101.17% | 156.91–157.15 GiB |
| CTA-local NVFP4 | 8/2 | 36,728.43 | 94.54% | 211.05–211.16 GiB |
| 27/5 depth hybrid | 8/2 | 37,394.00 | 96.25% | 228.28–233.42 GiB |
| Forward / hidden-state gradient / weight gradient | Tokens/s/GPU | Difference | Outcome |
|---|---|---|---|
| BF16 / BF16 / BF16 | 34.00K | baseline | BF16 control |
| lowp † / BF16 / BF16 | 33.95K | Loss differed from control | |
| lowp † / BF16 / MXFP8 | 33.91K | Loss and gradients differed |