cs.AIFeb 25, 2026

ArchAgent: Agentic AI-driven Computer Architecture Discovery

Authors: Raghav Gupta, Akanksha Jain, Abraham Gonzalez, Alexander Novikov, Po-Sen Huang, Matej Balog, Marvin Eisenberger, Sergey Shirobokov, 

Organizations: University of California, Berkeley · Google · Google DeepMind

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Abstract

Agile hardware design flows are a critically needed force multiplier to meet the exploding demand for compute. Recently, agentic generative AI systems have demonstrated significant advances in algorithm design, improving code efficiency, and enabling discovery across scientific domains. Bridging these worlds, we present ArchAgent, an automated computer architecture discovery system built on AlphaEvolve. We show ArchAgent's ability to automatically design/implement state-of-the-art (SoTA) cache replacement policies (architecting new mechanisms/logic, not only changing parameters), broadly within the confines of an established cache replacement policy design competition. In two days without human intervention, ArchAgent generated a policy achieving a 5.3% IPC speedup improvement over the prior SoTA on public multi-core Google Workload Traces. On the heavily-explored single-core SPEC06 workloads, it generated a policy in just 18 days showing a 0.9% IPC speedup improvement over the existing SoTA (a similar "winning margin" as reported by the existing SoTA). ArchAgent achieved these gains 3-5x faster than prior human-developed SoTA policies. Agentic flows also enable "post-silicon hyperspecialization" where agents tune runtime-configurable parameters exposed in hardware policies to further align the policies with a specific workload (mix). Exploiting this, we demonstrate a 2.4% IPC speedup improvement over prior SoTA on SPEC06 workloads. Finally, we outline broader implications for computer architecture research in the era of agentic AI. For example, we demonstrate the phenomenon of "simulator escapes", where the agentic AI flow discovered and exploited a loophole in a popular microarchitectural simulator - a consequence of the fact that these research tools were designed for a (now past) world where they were exclusively operated by humans acting in good-faith.

Figures & tables

Figure 1. High-level system diagram of ArchAgent, our agentic-AI-based computer architecture discovery system. In this example, novel cache replacement policy candidates are automatically designed/implemented by AlphaEvolve in ChampSim, a popular trace-based microarchitectural simulator. ChampSim is then compiled and run with a specified workload suite (e.g., SPEC) to evaluate the new policy on a target metric (e.g., IPC). This process continues iteratively, with ArchAgent continually proposing and evaluating new logic/mechanisms within the policy.
PolicyWorkloadSimulation InstructionsEvaluation MetricEvolution Time
EvolutionValidation
Policy3119 Memory Intensive SPEC06 Benchmarksmax(50M, 100M) within 1 hr1Bgeomean(IPCpolicyIPClru)geomean\left(\frac{\text{IPC}_{\text{policy}}}{\text{IPC}_{\text{lru}}}\right)18 days
Policy31-Tuned19 Memory Intensive SPEC06 Benchmarks1B1Bgeomean(IPCpolicyIPClru)geomean\left(\frac{\text{IPC}_{\text{policy}}}{\text{IPC}_{\text{lru}}}\right)< 8 days
Policy6111 Google Workload Traces50M75Mgeomean(mean(IPCpolicy)mean(IPClru))geomean\left(\frac{\text{mean(IPC}_{\text{policy}})}{\text{mean(IPC}_{\text{lru}})}\right)4 days
Policy6211 Google Workload Traces20M75Mgeomean(mean(IPCpolicy)mean(IPClru))geomean\left(\frac{\text{mean(IPC}_{\text{policy}})}{\text{mean(IPC}_{\text{lru}})}\right)2 days
Table 2. Comparison of Policy Evolution Setups. In Evaluation Metric , geomean is geometric-mean across benchmarks while mean(IPC) refers to the arithmetic mean of IPC across all cores.
Figure 4. Performance improvement (suite-level geomean IPC speedup normalized to LRU) compared to estimated development time of replacement policies for the single-core prefetch-enabled ChampSim configuration on memory-intensive SPEC06 workloads. Slope (grey, italics) denotes percentage point improvement per day.
Figure 5. Ablation study measuring improvement in suite-level geomean IPC speedup with each new technique that composes Policy31 for the single-core prefetch-enabled ChampSim configuration running SPEC06 memory intensive workloads.
Figure 6. Per-workload improvement in policy IPC speedup normalized to LRU for the single-core prefetch-enabled ChampSim configuration running SPEC 2006 memory intensive workloads.
Figure 6
Figure 9. Per-workload improvement in policy IPC speedup normalized to LRU for the multi-core prefetch-enabled ChampSim configuration running Google Workload Traces.
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