Organizations: Guangdong Laboratory of Artificial Intelligence and Digital Economy (SZ), Shenzhen, 518107, China · Cloud Computing and Distributed Systems (CLOUDS) Lab, School of Computing and Information Systems, University of Melbourne, Melbourne, VIC 3010, Australia · College of Mathematics and Computer Science, Shantou University, Shantou, 515063, China
While Spiking Neural Networks (SNNs) promise to circumvent the severe Size, Weight, and Power (SWaP) constraints of edge intelligence, the field currently faces a "Deployment Paradox" where theoretical energy gains are frequently negated by the inefficiencies of mapping asynchronous, event-driven dynamics onto traditional von Neumann substrates. Transcending the reductionism of algorithm-only reviews, this survey adopts a rigorous system-level hardware-software co-design perspective to examine the 2020-2025 trajectory, specifically targeting the "last mile" technologies - from quantization methodologies to hybrid architectures - that translate biological plausibility into silicon reality. We critically dissect the interplay between training complexity (the dichotomy of direct learning vs. conversion), the "memory wall" bottlenecking stateful neuronal updates, and the critical software gap in neuromorphic compilation toolchains. Finally, we envision a roadmap to reconcile the fundamental "Sync-Async Mismatch," proposing the development of a standardized Neuromorphic OS as the foundational layer for realizing a ubiquitous, energy-autonomous Green Cognitive Substrate.
Figures & tables
Fig. 1: Overview of the paradigm shift from Traditional DNNs to Spiking Neural Networks (SNNs). (Top) Data Representation: DNNs process redundant frame-based image sequences, whereas SNNs process sparse, asynchronous event streams represented in a spatiotemporal volume ( x,y,t ). (Middle) Neuron Dynamics: Unlike static activation functions (e.g., Sigmoid) in DNNs, SNNs employ biologically plausible Leaky Integrate-and-Fire (LIF) neurons that integrate temporal information governed by differential equations. (Bottom) Energy Efficiency: The shift from dense MAC operations to event-driven Accumulate (AC) logic results in an ultra-low energy footprint, making SNNs highly suitable for edge intelligence.
Fig. 2: Hierarchical Organization of the Survey. The article is structured into four main pillars: Part I establishes the theoretical foundations and defines the “Deployment Paradox”; Part II explores the technical frontiers across algorithms, hardware, and toolchains (2020–2025); Part III examines real-world realization in key edge applications; and Part IV synthesizes challenges to propose a roadmap towards a unified Neuromorphic OS.
Fig. 3: Dataflow Contrast: Continuous vs. Event-Driven. (Left) DNN Dataflow: Relies on dense Matrix-Vector Multiplication (MAC), creating a continuous “Memory Wall” as weights are fetched unconditionally. (Right) SNN Dataflow: Utilizes a conditional trigger mechanism where memory access and computation occur only upon spike arrival. This sparsity-aware processing significantly reduces off-chip memory bandwidth requirements.
Potentially very high, especially on neuromorphic hardware
Generally lower, can be power-intensive
Temporal Processing
Intrinsic capability to process temporal data
Often requires recurrent architectures (RNNs, LSTMs)
Biological Plausibility
Higher; mimics neural dynamics and learning rules like STDP
Lower; learning (e.g., backpropagation) often not bio-plausible
TABLE I: Comparison of SNNs and DNNs
Fig. 4: Radar chart illustrating the multidimensional trade-offs between Neuromorphic SNNs and a traditional Edge DNN baseline. While the DNN maintains a marginal advantage in static accuracy, the SNN demonstrates superior performance in SWaP-constrained metrics—specifically Energy Efficiency, Sparsity, and Always-on Suitability. This architectural alignment identifies SNNs as the optimal candidate for resource-limited edge deployment despite the accuracy trade-off.
Fig. 5: Taxonomy of Brain-inspired Edge Intelligence. The survey is structured around four pillars: (1) Training Paradigms : Highlighting the shift from conversion to direct training algorithms like STBP and tdBN ; (2) Neuromorphic Hardware : Covering native digital chips, FPGA accelerators, and hybrid architectures like Tianjic ; (3) Co-design Strategies : Focusing on NAS and temporal quantization; (4) System & Applications : Emphasizing high-speed vision ( Vidar ) and edge-cloud orchestration.
Facilitates training of deep SNNs deployable on edge; Seamless PyTorch integration
[ 23 ]
TABLE III: Selected SNN Software Frameworks and Mapping Toolchains (2020–2025)
Fig. 6: Proposed SNN-based Cloud-Edge Collaboration Framework. The cloud server hosts a complex Teacher ANN to guide lightweight Student SNNs on edge nodes via knowledge distillation. Edge nodes process real-time event streams and only offload low-confidence “hard examples” to the cloud, significantly reducing bandwidth usage.
Domain
Task
Approach / Model
Hardware
Key Performance Metrics
Ref.
CV
Neural Rendering
Spiking-NeRF (Hybrid SNN)
GPU/Simulated
Quality: Comparable PSNR; Energy: 2.27 × reduction vs. NeRF
Optimized NoC designs; Standardized IR (e.g., NIR); Platform-agnostic frameworks (Lava)
[ 109 , 138 ]
TABLE V: Major Challenges in Deploying SNNs at the Edge and Current Research Thrusts
Fig. 7: Architectural Comparison. (a) Traditional Von Neumann architecture separates memory and processing. The data bus (shown as parallel lines) becomes a bottleneck. (b) Neuromorphic architecture integrates memory and computation (M+C) into distributed cores.
Fig. 8: Conceptual Quantum-Neuromorphic Synergy. Quantum algorithms (e.g., QAOA) are utilized to solve NP-hard optimization problems inherent in SNN design, such as Neural Architecture Search (NAS) or synaptic routing, enabling the deployment of highly optimized SNNs on neuromorphic hardware.
Spiking Neural Networks (SNNs) offer a promising solution for energy-efficient edge intelligence; however, their hardware deployment is constrained by memory overhead, inefficient scaling operations, and limited parallelism. This work proposes L-SPINE, a low-precision SIMD-enabled spiking neural compute engine for efficient edge inference. The architecture features a unified multi-precision datapath supporting 2-bit, 4-bit, and 8-bit operations, leveraging a multiplier-less shift-add model for neuron dynamics and synaptic accumulation. Implemented on an AMD VC707 FPGA, the proposed neuron requires only 459 LUTs and 408 FFs, achieving a critical delay of 0.39 ns and 4.2 mW power. At the system level, L-SPINE achieves 46.37K LUTs, 30.4K FFs, 2.38 ms latency, and 0.54 W power. Compared to CPU and GPU platforms, it reduces inference latency from seconds to milliseconds, achieving an up to three orders-of-magnitude improvement in energy efficiency. Quantisation analysis shows that INT2/INT4 configurations significantly reduce memory footprint with minimal accuracy loss. These results establish L-SPINE as a scalable and efficient solution for real-time edge SNN deployment.
Sonu Kumar, Mukul Lokhande, Santosh Kumar Vishvakarma
Centre for Advanced Electronics, Indian Institute of Technology Indore, Simrol 453552, Indore, India · Dept. of Electrical Engineering, Indian Institute of Technology Indore, Simrol 453552, Indore, India
We propose EdgeSpike, a co-designed spiking neural network (SNN) framework for autonomous low-power sensing in edge Internet of Things (IoT) architectures. EdgeSpike unifies (i) a hybrid surrogate-gradient and direct-encoding training pipeline, (ii) a hardware-aware neural architecture search (NAS) bounded by per-inference energy and memory budgets, (iii) an event-driven runtime targeting Intel Loihi 2, SpiNNaker 2, and commodity ARM Cortex-M microcontrollers with custom spike-sparse SIMD kernels, and (iv) a lightweight local plasticity rule enabling continual on-device adaptation without backpropagation. The framework is evaluated across five sensing tasks (keyword spotting, vibration-based machine fault detection, surface electromyography gesture recognition, 77 GHz radar human-activity classification, and structural-health acoustic-emission monitoring) on three hardware targets. EdgeSpike achieves a mean classification accuracy of 91.4%, within 1.2 percentage points (pp) of strong INT8 convolutional neural network (CNN) baselines (mean 92.6%), while reducing energy per inference by 18x to 47x on neuromorphic hardware (mean 31x) and by 4.6x to 7.9x on Cortex-M (mean 6.1x). End-to-end latency remains at or below 9.4 ms across all 15 task-hardware configurations. A seven-month, 64-node wireless field deployment confirms a 6.3x extension in projected battery lifetime (from 312 to 1978 days at 2 Wh per node) and bounded accuracy degradation under seasonal drift (0.7 pp with on-device adaptation versus 2.1 pp without). Hardware-aware NAS evaluates 8400 candidates and yields a 12-point Pareto front. EdgeSpike will be released as open source with reproducible training pipelines, hardware-portable runtimes, and benchmark suites.
Gustav Olaf Yunus Laitinen-Fredriksson Lundstrom-Imanov, Taner Yilmaz
Department of Economics, Stockholm University, Universitetsvägen 10 A, SE-106 91 Stockholm, Sweden · Department of Computer Engineering, Afyon Kocatepe University, 03200 Afyonkarahisar, Türkiye
Spiking neural networks (SNNs) offer inherent energy efficiency due to their event-driven computation model, making them promising for edge AI deployment. However, their practical adoption is limited by the computational overhead of deep architectures and the absence of input-adaptive control. This work presents SPARQ, a unified framework that integrates spiking computation, quantization-aware training, and reinforcement learning-guided early exits for efficient and adaptive inference. Evaluations across MLP, LeNet, and AlexNet architectures demonstrated that the proposed Quantised Dynamic SNNs (QDSNN) consistently outperform conventional SNNs and QSNNs, achieving up to 5.15% higher accuracy over QSNNs, over 330 times lower system energy compared to baseline SNNs, and over 90 percent fewer synaptic operations across different datasets. These results validate SPARQ as a hardware-friendly, energy-efficient solution for real-time AI at the edge.
Parth Patne, Mahdi Taheri, Ali Mahani +3
Brandenburg Technical University, Cottbus, Germany · Tallinn University of Technology, Tallinn, Estonia · Shahid Bahonar University of Kerman, Iran +2