NativeTernary: A Self-Delimiting Binary Encoding with Unary Run-Length Hierarchy Markers for Ternary Neural Network Weights, Structured Data, and General Computing Infrastructure

Maharshi Savdhariya

cs.LGApr 3, 2026

NativeTernary: A Self-Delimiting Binary Encoding with Unary Run-Length Hierarchy Markers for Ternary Neural Network Weights, Structured Data, and General Computing Infrastructure

Authors: Maharshi Savdhariya

Organizations: Indian Institute of Technology Bombay · IIM Udaipur

Abstract

BitNet b1.58 (Ma et al., 2024) demonstrates that large language models can operate entirely on ternary weights {-1, 0, +1}, yet no native binary wire format exists for such models. NativeTernary closes this gap. Benchmarked against GGUF on the real BitNet b1.58 2B4T architecture (24 layers, ~170 tensors, 2B parameters): NativeTernary encodes ternary weights at exactly 2.000 bits per weight -- 1.31x smaller than GGUF Q2_K and 4.0x smaller than GGUF int8 -- while reducing boundary and framing overhead by 460x (91 bytes vs ~42KB of GGUF tensor headers). Encode throughput: 47--69 MB/s. Decode throughput: 35--45 MB/s on commodity hardware. The decoder is a 10-line stateless state machine resilient to bitstream corruption.

Figures & tables

Bit-pair	Role	Balanced value	Unsigned value
00	Data symbol 0	$-1$	$0$
01	Data symbol 1	$0$	$1$
10	Data symbol 2	$+1$	$2$
11	Structural delimiter	(reserved)	(reserved)

Table 1: Primary scheme bit-pair assignments

Bit-pair	Role
00	Data bit 0 (continuation)
01	Data bit 1 (continuation)
10	Symbol start — type A namespace
11	Symbol start — type B namespace

Table 2: Dual-starter variant bit-pair roles

Interpretation	Values	Best for	Key advantage
Balanced ternary	$\{-1,0,+1\}$	Signed deltas, neural weights, DSP	Native sign; safer on noisy channels
Unsigned ternary	$\{0,1,2\}$	Counters, indices, DNA bases	Simpler hardware arithmetic

Table 3: Balanced vs. unsigned ternary tradeoffs

Delimiter	Detection hardware	Power profile	Recommended use
{11} (primary)	OR gate on both bits	High (both bits set)	General purpose; easy hardware detection
{00}	NOR gate on both bits	Minimal (zero switching)	Ultra-low-power IoT, implantables, LoRa
{01}	XNOR on bits	Medium	Reserved for future standardisation
{10}	XNOR on bits	Medium	Reserved for future standardisation

Table 4: Comparison of all four bit-pair delimiter choices

Format	Bits/weight	Per-tensor overhead	Notes
NativeTernary	2.000	2 bits per layer boundary	Exact — zero waste
GGUF Q2_K	2.625	$\sim$ 256 bytes per tensor	Best current quantization
GGUF Q4_0	4.500	$\sim$ 256 bytes per tensor	Common default
GGUF int8	8.000	$\sim$ 256 bytes per tensor	Naive ternary storage

Table 5: Bits per weight: NativeTernary vs. GGUF storage modes

Scale	Weights	NT	Q2_K	Q4_0	vs Q2_K	vs int8
Small	1M	250 KB	329 KB	563 KB	0.76 $\times$	0.25 $\times$
Medium	125M	31.3 MB	41.1 MB	70.4 MB	0.76 $\times$	0.25 $\times$
Large	1B	250 MB	329 MB	563 MB	0.76 $\times$	0.25 $\times$

Table 6: Encoded size across model scales (synthetic uniform distribution)

Scale	Weights	Encode MB/s	Decode MB/s
Small	1M	46.8	35.3
Medium	125M	69.2	45.1
Large	1B	62.6	35.7

Table 7: Encode and decode throughput on commodity hardware

Format	Weight data	Boundary/header overhead	Overhead ratio
NativeTernary	500 MB	91 bytes	$<0.0001$ %
GGUF Q2_K	656 MB	$\sim$ 42 KB	460 $\times$ larger than NT
GGUF int8	2,000 MB	$\sim$ 42 KB	460 $\times$ larger than NT

Table 8: Boundary overhead: NativeTernary vs. GGUF on BitNet b1.58 2B4T (2B params, 170 tensors)

LLM Compression

Large language model compression reduces the memory, compute, and context costs of LLMs while aiming to preserve their capabilities.

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Breaking the 1.58-bit Barrier for Ternary LLMs

Evangelos Georganas, Alexander Heinecke, Pradeep Dubey

Intel Corporation

Ternary Quantization LLM Compression LLM Inference Acceleration

Open paper AskPDF arXiv

Ternary Large Language Models (LLM) store every weight as one of three symbols

\{-1,0,+1\}

, so the cost of a ternary model is conventionally referenced to the information-theoretic

\log_2 3 \approx 1.585

bits per weight. The prevailing deployment format packs five ternary weights into one byte (five-trit packing), and due to the power-of-two group sizes used in practice this rounds up to

1.625

bits per weight. This effective storage bit-width treats the three symbols

\{-1,0,+1\}

as equiprobable. We measure the actual symbol distribution of 29 ternary LLM models and find that zeros account for up to

51.5\%

of all weights. Motivated by this finding, we introduce BITCOS, a simple distribution-adaptive layout comprised of a dense presence bitmap plus a compacted sign vector, and costs

2 - z

bits per weight element given a zero density

z

in the model's weights. BITCOS stores weights more compactly than the five-trit packing in 26 of the 29 tested models, and reaches

1.485

bits per weight on the sparsest of them. BITCOS is amenable to efficient unpacking on modern processors and GPUs, and we present optimized unpacking sequences for AVX-512, AVX2 and Intel Xe2 GPUs. Measured against production state-of-the-art ternary matrix-vector multiplication kernels, at the zero densities real-world ternary models exhibit, the realized gain with our proposed layout is up to

1.28\times

. Finally, we illustrate end-to-end LLM inference results on 5 different platforms (client and server CPUs, integrated and discrete Xe2 GPUs) where decode throughput improves by up to

1.18\times

on CPUs and

1.27\times

on GPUs.

Abstract

LLM Compression

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