Memory Wall is not gone: A Critical Outlook on Memory Architecture in Digital Neuromorphic Computing

Amirreza Yousefzadeh; Sameed Sohail; Ana Lucia Varbanescu

cs.ARApr 9, 2026

Memory Wall is not gone: A Critical Outlook on Memory Architecture in Digital Neuromorphic Computing

Authors: Amirreza Yousefzadeh, Sameed Sohail, Ana Lucia Varbanescu

Organizations: University of Twente, Enschede, NL

Abstract

The rapid advancement of neuromorphic technology aims to address the memory wall challenge inherent in conventional von Neumann architectures. This paper critically examines current digital neuromorphic processors and their strategies to mitigate this bottleneck. While designed to bring computation closer to memory through distributed architectures, our findings indicate that on-chip memory systems, including SRAM and emerging technologies like STT-MRAM, have become significant consumers of area and energy, leading to a new memory wall. Through an analysis of energy and area efficiency in various memory technologies, we argue that without a re-evaluation of memory organization, digital neuromorphic processors may struggle to compete effectively in edge and embedded applications. We conclude with potential pathways for future research to overcome the limitations of on-chip memory in neuromorphic systems.

Figures & tables

Fig. 1: The trade-off between area efficiency and energy consumption in three different integrated (on-chip) memory technologies at the FDX-22nm node, including Register-Files (RF) created using standard digital cells, SRAM blocks, and MRAM blocks designed with commercial memory compilers. For the MRAM, the energy consumption mentioned refers solely to read access.

Fig. 2: Fully distributed memory (mem) and processing elements (PE) in neuromorphic processors aim to eliminate the memory wall.

Fig. 3: Spatial mapping of the layers of a neural network onto tiled memory-processing element (PE) cores.

Architecture	Synapse	Neuron	Benchmark	#Params	On-chip	Mapping
	Memory	Memory	Network	(bits)	Mem. (bits)	Efficiency
IBM TrueNorth [ 4 ]	SRAM	SRAM	CIFAR-10	2M (2.3Mb)	440 M	0.5 %
Intel Loihi [ 5 ]	SRAM	SRAM	MobileNet	4M (36Mb)	4.0 G	0.9 %
GrAI VIP [ 6 ]	SRAM	SRAM	MobileNet	3.07M (24.56Mb)	89.8 M	27.3 %
SPECK [ 7 ]	SRAM	SRAM	N-MNIST	9.3K (74.4Kb)	250 k	29.8 %

TABLE I: Memory utilisation in state-of-the-art neuromorphic chips. Mapping efficiency is defined as the ratio of parameter bits to the aggregate on-chip memory capacity allocated to the network.

Neuromorphic Computing

Neuromorphic computing uses brain-inspired, event-driven algorithms and hardware to process information with low power and latency.

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Scalable neuromorphic computing from autonomous spiking dynamics in a clockless reconfigurable chip

Eric Oliveira Gomes, Damien Rontani

LMOPS UR4423 Laboratory, CentraleSup´elec and Universit´e de Lorraine, Metz F-57070, France

Energy-Efficient ML Spiking Neural Networks Neuromorphic Computing

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We propose a scalable neuromorphic architecture based on spiking dynamics emerging from the autonomous time-continuous evolution of clockless (asynchronous) digital circuits. Implemented on commercially available field-programmable gate arrays (FPGAs), our system implements networks of interacting Boolean spiking neurons with configurable excitatory and inhibitory synaptic weights. A complete processing pipeline enables efficient handling of spike-encoded data for solving machine-learning tasks. We demonstrate competitive performance for an audio classification task with spike-based encoding and high-speed processing. Power consumption is significantly lower than traditional digital implementations; this makes our approach an efficient alternative that bridges the gap to dedicated analog neuromorphic systems without the need for specialized hardware design. More generally, our approach establishes clockless digital hardware as a viable platform for neuromorphic computing. It paves the way for reconfigurable chips to be turned into energy-efficient quasi-analog neuromorphic processors.

Abstract

Neuromorphic Computing

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