Logic Gate Networks and Lookup Table Networks as Lightweight Hardware Classifiers for Inter-patient ECG Arrhythmia Classification

Wout Mommen; Lars Keuninckx; Siddharth Patil; Paul Detterer; Achiel Colpaert; Piet Wambacq

cs.LGSep 26, 2026

Logic Gate Networks and Lookup Table Networks as Lightweight Hardware Classifiers for Inter-patient ECG Arrhythmia Classification

Authors: Wout Mommen, Lars Keuninckx, Siddharth Patil, Paul Detterer, Achiel Colpaert, Piet Wambacq

Organizations: Interuniversity Microelectronics Centre (IMEC), Kapeldreef 75, Leuven, 3001, Belgium · Vrije Universiteit Brussel, Pleinlaan 2, Elsene, 1050, Belgium · imec Holst Centre, High Tech Campus 31, Eindhoven, 5656 AE, the Netherlands

Abstract

Deep Differentiable Logic Gate Networks (LGNs) and Lookup Table Networks (LUTNs) offer a promising approach for very low power inference due to their use of simple binary logic operations instead of arithmetic. In this work, we generalize the logic gates of LGNs to more than two input pins, naturally arriving at networks consisting of $N$ -input LUTs. To obtain a differentiable expression for training the $N$ -LUT entries, we adopt the Boolean equation of a $2^N$ :1 multiplexer (MUX) and optimize its input parameters during training. We investigate the applicability of LGNs and LUTNs to inter-patient ECG arrhythmia classification using the MIT-BIH data set. The proposed models achieve up to 94.41% accuracy and a $jκ$ index of 0.683 on a four-class task, showing a competitive performance compared to existing CNN-, SVM- and SNN-based methods. Our LGNs and LUTNs only require an estimated 2.89k to 6.17k FLOPs, including preprocessing and readout, which is three to six orders of magnitude less than state-of-the-art methods. We verified our design, which consists of the preprocessing pipeline and a 6-LUTN classifier, by implementing it on a Xilinx Zynq-7000 ZedBoard. The complete system consumes a dynamic energy of 8.25 $μ$ J/inference, of which only 0.46 nJ is utilized by the LUTN classifier. These results show that both LGNs and LUTNs can be employed as lightweight hardware-based classifiers for inter-patient ECG arrhythmia classification.

Figures & tables

$i$	Operation	01	10	11	$f_{i}$
0	False	0	0	0	0
1	$x_{0}$ $\wedge$ $x_{1}$	0	0	1	$x_{0}x_{1}$
2	$\neg$ ( $x_{0}$ $\Rightarrow$ $x_{1}$ )	0	1	0	$x_{0}-x_{0}x_{1}$
3	$x_{0}$	0	1	1	$x_{0}$
4	$\neg$ ( $x_{0}$ $\Leftarrow$ $x_{1}$ )	1	0	0	$x_{1}-x_{0}x_{1}$
5	$x_{1}$	1	0	1	$x_{1}$

Table 1: The index of summation

i

, corresponding binary operation, truth table and real-valued logic operation

f_{i}

utilized in Eq. ( 1 ) [ 23 ] .

Primitive	No. binary functions
2-LUT	$16$
4-LUT	$65\ 536$
6-LUT	$1.845\cdot 10^{19}$
$N$ -LUT	$2^{2^{N}}$

Table 2: The primitive and number of binary operations it can express. An

N

-LUT stands for a lookup table with

N

input pins.

Figure 1: Excerpt of the ECG data highlighting the current R-peak position

R_{0}

, three previous R-peak positions

R_{m1}

R_{m2}

R_{m3}

, and the next R-peak position

R_{p1}

. Using these peak positions, all four RR-interval features were derived. Around each peak, we define a gray window of 180 samples that was utilized to determine the morphological features

M_{1}

M_{4}

and the crest factor

cf_{1}

Figure 2: A visualization of a 3-layer LGN that predicts four classes: N, S, V and F. The input values are binary numbers, and are propagated through the network. The final layer groups the gates, and counts the number of 1’s that appear at the gate-outputs for each group. The group sum (i.e. popcount) that has accumulated the highest value is the winner and assigns the corresponding class label to the example. In reality, we employ LGNs with 8000 gates per layer instead of just eight as displayed in the figure, meaning that the maximum popcount value is equal to 2000 instead of two.

Figure 3: An illustration of a 4-layer Lookup Table Network (LUTN) that consists out of 6-input LUTs. The binary input values are propagated through the LUT layers, where each hidden layer performs a learned binary transformation on its received binary input values. The LUTs in the final layer are grouped. Each group corresponds with a popcount that counts the number of 1’s. The popcount with the highest value gives the predicted class label. In this illustration, only eight 6-LUTs per layer are displayed, such that the maximum popcount value is equal to two. For the MIT-BIH data set, we utilize 2000 6-LUTs per layer, such that the maximum popcount value is equal to 500.

Figure 4: Equivalence between an 8:1 MUX and a 3-input LUT. Left: An 8:1 MUX with 8 input values, 3 selector bits and one output value. Middle: A lookup table with entries

W_{0},\ldots,W_{7}

, which are input values of the MUX. Right: The symbol we will employ for a LUT with three input values and one output value.

Models	Ref.	2 layer	3 layers	4 layers
LGNs	[ 9 ]	97.30	97.44	97.47
LGNs	Proposed	97.90	98.25	98.35
LGNs r	Proposed	97.56	97.64	97.76

Table 3: Accuracy (%) on the mixed-patient MIT-BIH benchmark using LGN classifiers with varying number of layers. The second and third rows use the binary and full-precision features described in this work respectively. The superscript

r

indicates the use of rate coding. The first row only uses dynamic thresholds as preprocessing [ 9 ] .

Models	Ref.	$j$ index	$\kappa$ index	$j\kappa$ index	Acc. (%)
LGN	[ 9 ]	1.540	0.483	0.434	91.13
SNN	[ 16 ]	–	–	–	93.70
SNN r	[ 32 ]	2.490	0.595	0.609	90.00
SNN r +CNN	[ 32 ]	2.660	0.597	0.631	90.00
Deep CNN	[ 13 ]	2.693	0.729	0.701	89.00
SVM Ensemble	[ 19 ]	3.164	0.755	0.773	94.50

Table 4: Comparison of our trained models with state-of-the-art results on the MIT-BIH data set employing the inter-patient paradigm. For our models, the best

j\kappa

index and accuracy values across all evaluated network depths are reported. A dash means that this metric could not be determined from the reference.

		N				S				V				F
Models	Ref.	P	Se	Sp	$F_{1}$	P	Se	Sp	$F_{1}$	P	Se	Sp	$F_{1}$	P	Se	Sp	$F_{1}$
SNN r	[ 32 ]	0.970	0.920	0.779	0.944	0.460	0.670	0.966	0.545	0.590	0.770	0.963	0.668	–	–	–	–
SNN r + CNN	[ 32 ]	0.970	0.920	0.779	0.944	0.360	0.680	0.948	0.471	0.840	0.780	0.990	0.809	–	–	–	–
Deep CNN	[ 13 ]	0.933	0.945	0.808	0.939	0.798	0.884	0.949	0.839	0.659	0.352	0.988	0.459	0.450	0.424	0.992	0.437
SVM Ensemble	[ 19 ]	0.982	0.959	0.863	0.971	0.498	0.781	0.966	0.608	0.938	0.948	0.996	0.943	0.236	0.124	0.997	0.162
LS-SVM	[ 27 ]	0.980	0.820	0.864	0.893	0.290	0.830	0.922	0.430	0.840	0.880	0.988	0.860	0.080	0.110	0.990	0.093

Table 5: The per-class precision (P), sensitivity (Se), specificity (Sp) and F 1 -score of our trained LGNs and LUTNs compared to other works on the MIT-BIH inter-patient test set. The superscript

r

indicates a rate-coded network. The blank entries represent values that could not be determined in a reliable manner.

	N	S	V	F
N	42557	222	627	355
S	1317	691	32	3
V	269	14	2913	12
F	289	1	93	5

Table 6: Confusion matrix of our 2-layer LGN with rate-coded inputs on the MIT-BIH inter-patient test set.

Models	Ref.	Architecture	Preprocessing	Network	Readout	Total
			FLOPs	FLOPs	FLOPs	FLOPs
ANN	[ 13 ]	Conv.	Not computed 1	$1.35\cdot 10^{9}$	0	$>$ 1.35 G
SNN r	[ 32 ]	Conv.	0	$31.0\cdot 10^{6}$	Not computed 1	$>$ 31.0 M
SVM	[ 19 ]	Ensemble	Not computed 1	$4.93\cdot 10^{6}$	0	$>$ 4.93 M
LGNs	Proposed	1x8000	2246	80	560	2.89 K
2-LUTN	Proposed	1x8000	2246	720	560	3.53 K

Table 7: Comparison of the number of floating-point operations per inference (FLOPs) for different approaches. The total number of FLOPs is the sum of the FLOPs for preprocessing, the network, and the readout. Only the convolution operations are counted for the ANN network FLOPs. Our networks presented here are only 1-layer feedforward architectures of 8000 gates/2-LUTs, 3000 4-LUTs or 2000 6-LUTs. Still, the number of network FLOPs can be extended to multilayer networks by multiplying the current value with the number of layers. In that case, the number of FLOPs for the preprocessing and readout stay the same. 1 Not computed, as the reported value is already notably higher than those of the proposed methods, and would not affect the comparative conclusions.

Figure 5: The block diagram of the full ECG preprocessing and LUTN classification pipeline, implemented on a Xilinx Zynq-7000 ZedBoard. The Processing System (PS) includes the dual-core Arm Cortex-A9 processor, memory controllers and AXI interconnect interfaces. Through this interconnect (i.e. AXI SmartConnect), the PS can control the custom IPs in the Programmable Logic (PL). The ECG processing IP reads raw ECG data and extracts the wanted binary features as explained in Section 3.1.3 . The 138-bit wide feature vector is fed into the single layer LUTN consisting of 2000 6-LUTs, after which one 9-bit adder is reused four times to calculate the class scores. The class with the highest score represents predicted class label.

Hardware Block	LUTs	FFs	BRAMs	DSPs	Latency	Latency	Dynamic Power	Energy
					(clk cycles)	(ms)	(mW)	( $\mu$ J)
ECG Preprocessing IP	17064	2811	3.5	53	3540	3.540	2.33	8.25
rr_feature_unit	3697	0	0	20	0 1	0 1	0.42	1.49
rr_history_unit	3194	314	0	9	504	0.504	0.59	2.09
morphology_unit	2903	735	0	3	295	0.295	0.24	0.85
crest_factor_unit	6254	574	0	21	1754	1.754	0.99	3.50

Table 8: The number of lookup tables (LUTs), flip-flops (FF), BRAMs and DSPs provided by the post-implementation report in Vivado for each hardware block and its components. The power is provided from the post-implementation report and converted to energy per inference employing a clock frequency of 1 MHz. The latency of the ECG Preprocessing IP is determined from the Vitis C/RTL Cosimulation Timeline Trace, while the latency of the LUTN Classifier IP is determined from Vivado. 1 Only combinational logic. 2 Control logic adds no latency.

Classifier	Ref.	Preproc.	R-peak Detec-	Energy/inf.	Power	Process	Platform
		Included	tion Included	(nJ/inf.)	(mW)
LD classifier	[ 7 ]	Yes	No	–	–	–	No implementation
SVM Ensemble	[ 19 ]	Yes	No	–	–	–	No implementation
SNN r	[ 32 ]	No 1	No	Not reported	77	28 nm	Shenjing [ 28 ] ASIC simulator
SNN	[ 16 ]	Yes	Not reported	300	Not reported	28 nm CMOS	Fabricated ASIC
LGN	[ 9 ]	No 1,2	No	5.67	Not reported	55 nm CMOS ULP	Synopsys Design Compiler (ASIC)

Table 9: Comparison of ECG arrhythmia classifiers in terms of power (mW) and energy/inference (nJ/inf.). The reported energy or power does not always include preprocessing or R-peak detection. 1 Does not contain any significant preprocessing. 2 Employs the mixed-patient scheme.

Future Research Direction	Motivation
Advanced lightweight preprocessing	The current pipeline does not classify the supraventricular ectopic (S) beats well compared to the state of the art. Therefore, the current preprocessing should be adapted for enhanced S class detection, while keeping the computational complexity simple.

Advanced class imbalance mitigation	The fusion (F) class is heavily underrepresented in the MIT-BIH data set. To mitigate this underrepresentation, synthetic minority oversampling (SMOTE) [ 6 ] could be employed to create additional F class examples. In addition, focal loss [ 14 ] could be utilized for better classification performance of examples which are hard to classify.

Limiting weight values and binarization method	Early results show that clamping LUT entries to $[0,1]$ during the full training phase, enhances final performance of the deep 6-LUTNs on the MIT-BIH data set. Yet, the weight values could be bounded by applying a sigmoid function. Instead of the current layer-wise binarization method that requires more training epochs for deeper networks, sigmoid annealing the full network could be employed to lower training times.

Table 10: Possible future research directions and their main motivations.

Appendix figures & tables8 assets

Supplementary material from the paper’s appendix.

Appendix

Panel of Figure 6 — Figure 6: Comparison between single threshold coding and rate coding on (a) the MNIST Handwritten Digits data set and (b) the Fashion-MNIST data set, for LGNs using 8000 gates per layer.

	MNIST		Fashion-MNIST
Model	1 layer	2 layers	1 layer	2 layers
LGN	91.22	94.57	77.41	79.40
2-LUTN	91.74	94.22	77.36	79.20
4-LUTN	92.66	96.73	78.19	80.46
6-LUTN	93.88	97.29	79.61	80.00
LGN r	91.22	95.14	81.38	83.69

Appendix

Table 11: Accuracies (%) of the LGNs [ 23 ] and LUTNs on the MNIST Handwritten Digits and Fashion-MNIST data sets.

Model	Ref.	No. classes	Temp.
LGNs	Proposed	4	30
LGNs r	Proposed	4	20
LGNs	[ 9 ]	4	8
LGNs	[ 9 ]	5	5

Appendix

Table 12: Ideal softmax temperatures for the networks that use mixed patients for the MIT-BIH data set. Our models use the preprocessing as explained in Section 3.1.3 , while Feng et al. [ 9 ] utilizes dynamic thresholds. The superscript

r

indicates rate-coded inputs. All LGNs consisted out of 8000 gates per layer.

Model	Ref.	Temp.
LGNs	[ 9 ]	30
LGNs	Proposed	35
LGNs r	Proposed	10
2-LUTNs	Proposed	50
4-LUTNs	Proposed	30
6-LUTNs	Proposed	25

Appendix

Table 13: Ideal softmax temperatures for the networks that use the inter-patient paradigm. Our models use the preprocessing as explained in Section 3.1.3 , while Feng et al. [ 9 ] utilizes dynamic thresholds. The superscript

r

indicates rate-coded inputs. The LGNs and 2-LUTNs had 8000 gates/LUTs per layer, while the 4-LUTNs and 6-LUTNs consisted of 3000 and 2000 LUTs per layer respectively.

No. Layers	LGNs	LGNs r	2-LUTNs	2-LUTNs r	4-LUTNs	4-LUTNs r	6-LUTNs	6-LUTNs r	LGNs [ 9 ]
1	93.79	93.63	93.99	93.17	94.00	92.91	94.04	92.66	90.86
2	94.06	93.48	94.18	93.34	94.26	92.85	94.24	92.79	90.30
3	94.19	93.50	94.23	93.41	94.21	93.14	94.20	93.17	89.73
4	94.28	93.26	94.41	93.54	94.23	93.20	88.67	92.14	91.13

Appendix

Table 14: Accuracies (%) of our networks (LGNs, 2-LUTNs, 4-LUTNs, and 6-LUTNs) that use the inter-patient paradigm for different number of layers. The LGNs/2-LUTNs have 8000 gates/LUTs per layer, the 4-LUTNs have 3000 LUTs/layer, and the 6-LUTNs have 2000 LUTs/layer. The superscript

r

indicates the use of rate coding as described in this work. This is compared to the known state-of-the-art LGN results on this data set. The LUT entries are not clamped to

[0,1]

during training.

No. layers	LGNs	LGNs r	2-LUTNs	2-LUTNs r	4-LUTNs	4-LUTNs r	6-LUTNs	6-LUTNs r	LGNs [ 9 ]
1	0.645	0.633	0.659	0.595	0.646	0.549	0.651	0.572	0.407
2	0.569	0.683	0.669	0.618	0.638	0.614	0.643	0.571	0.434
3	0.650	0.660	0.654	0.585	0.624	0.557	0.583	0.561	0.412
4	0.559	0.649	0.669	0.610	0.635	0.612	0.000	0.000	0.409

Appendix

Table 15:

j\kappa

indexes of our networks (LGNs, 2-LUTNs, 4-LUTNs and 6-LUTNs) that use the inter-patient paradigm for different number of layers. The LGNs/2-LUTNs have 8000 gates/LUTs per layer, the 4-LUTNs have 3000 LUTs/layer and the 6-LUTNs have 2000 LUTs/layer. The superscript

r

indicates the use of rate coding as described in this work. This is compared to the known state-of-the-art LGN results on this data set. The LUT entries are not clamped to

[0,1]

during training.

	6-LUTNs		6-LUTNs r
No. Layers	Accuracy	$j\kappa$	Accuracy	$j\kappa$
1	94.07	0.649	92.59	0.565
2	94.30	0.655	92.67	0.562
3	94.36	0.647	93.09	0.537
4	94.32	0.645	92.80	0.552

Appendix

Table 16: Accuracy (%) and

j\kappa

index on the inter-patient MIT-BIH data set for 6-LUTNs and rate-coded 6-LUTNs (6-LUTNs r ) using 2000 6-LUTs per layer. These results applied clamping of the LUT entries to

[0,1]

during training.

Figure 7: The accuracy and

j\kappa

index of a 2-layer rate-coded LGN for a varying number of bit stream lengths. As expected, the longer the bit stream length, the closer our classifier is to attaining the maximum possible performance.

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Jun 13, 2026J/K move · Enter open · S save

ECG-LDC: A Hardware-Efficient Low-Dimensional Computing Framework for ECG Arrhythmia Classification

Anh Tran, Khanh Tran, Cuong Do

School of Engineering and Applied Science, University of Pennsylvania, Philadelphia, PA 19104, USA · VinUni–Illinois Smart Health Center, VinUniversity, Hanoi 100000, Vietnam · College of Engineering and Computer Science, VinUniversity, Hanoi 100000, Vietnam

Efficient Neural Network Inference Electrocardiogram Classification FPGA-Based Neural Network Acceleration

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Continuous cardiac monitoring in wearable devices demands classifiers that are simultaneously accurate, energy-efficient, and deployable on resource-constrained hardware. While deep neural network approaches have demonstrated high classification accuracy for electrocardiogram (ECG) arrhythmia detection, their substantial parameter counts and reliance on multiply-accumulate-intensive operations make them impractical for low-cost edge platforms. In this work, we propose ECG-LDC, a hardware-software co-design framework that adapts Low-Dimensional Computing (LDC) for real-time ECG arrhythmia classification. ECG-LDC employs a dual-encoder architecture with dedicated value and feature codebooks to independently encode morphological waveform features and RR-interval temporal features, enabling effective capture of both intra-beat and inter-beat cardiac dynamics. The framework encompasses data preprocessing, model training, and a hardware accelerator architecture prototyped on the Pynq-Z2 platform. Implemented using binary representations and XOR/XNOR-based operations, ECG-LDC achieves

97.18\%

accuracy with a memory footprint of only

3.86\ \text{kB}

. ECG-LDC sacrifices approximately

1.8\%

accuracy versus SOTA TinyML classifiers but achieves

11

570\times

reduction in memory usage; among FPGA-based five-class arrhythmia classifiers, it delivers the highest accuracy with up to

2.4\times

fewer LUTs and zero DSP block utilization, affirming its suitability for real-time arrhythmia detection on resource-constrained wearable platforms.

Abstract

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