KV4-RL: Unlocking Faster Asynchronous Rollouts for RLVR with INT4 KV Cache Quantization
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Abstract
Asynchronous rollout improves the efficiency of reinforcement learning with verifiable rewards (RLVR) by reducing under-utilization during long-tail generation. Sustained concurrency also concentrates context processing into fewer decode steps, increasing the KV workload per step. We characterize this KV concentration and find that KV cache quantization delivers substantially greater acceleration than weight-only and weight-activation quantization in our matched-workload comparisons. However, INT4 KV rollout can degrade learning even with token-level truncated importance sampling (TIS). We propose KV4-RL, which combines calibration-free INT4 KV quantization with selective INT8 protection of attention sinks and recent context. Protecting a bounded number of positions reduces sampler mismatch while retaining most of the speedup from INT4. Across 400 iterations of Qwen3-8B-Base GRPO training, KV4-RL achieves cumulative rollout speedup and cumulative full-iteration speedup over BF16 rollout, reaching rollout speedup over the final 50 iterations. Under a common BF16 evaluator, its final six-benchmark mean accuracy is within 0.5 percentage points of BF16-rollout training for both Qwen3-4B-Base and Qwen3-8B-Base.
Figures & tables
| avg@ | avg@ | |||||||
| Model | Rollout | MATH-500 | OlympiadBench | MinervaMath | AIME24 | AIME25 | AMC23 | Mean |
| Qwen3-8B-Base | BF16 | |||||||
| KV8 | ||||||||
| KV4 | ||||||||
| [4pt/2pt] | KV4-RL | |||||||
| Qwen3-4B-Base | BF16 | |||||||
Appendix figures & tables13 assets
Supplementary material from the paper’s appendix.
Appendix
| Setting | Value |
| Hardware per training run | 4 NVIDIA H200 GPUs |
| Rollout parallelism | Two DP replicas with TP2 each |
| Learner | FSDP2 with BF16 compute and FP32 master weights |
| Prompt groups / responses per group | / |
| Prompt / response token limits | 1,024 / 16,384 |
| Sampling temperature / top- | / with top- disabled |
| Task | Questions | Periodic | Dataset source | |
| MATH-500 | 500 | 8 | Yes | HuggingFaceH4/MATH-500 |
| AIME 2024 | 30 | 32 | Yes | Maxwell-Jia/AIME_2024 |
| AIME 2025 | 30 | 32 | Yes | yentinglin/aime_2025 |
| AMC 2023 | 40 | 32 | No | math-ai/amc23 |
| OlympiadBench | 674 | 8 | No | math-ai/olympiadbench |
| MinervaMath | 272 | 8 | No | math-ai/minervamath |
| Checkpoint | Phase 1 | Phase 2 | Phase 3 | Phase 4 | Phase 5 |
| 4B–100 | 608/621 | 576/798 | 448/1,033 | 304/1,384 | 168/1,963 |
| 4B–300 | 640/874 | 576/1,170 | 464/1,506 | 336/1,968 | 200/2,627 |
| 4B–500 | 640/1,463 | 544/1,895 | 400/2,568 | 272/3,518 | 176/4,767 |
| 8B–100 | 624/547 | 592/676 | 496/879 | 352/1,134 | 192/1,529 |
| 8B–250 | 656/1,863 | 384/3,271 | 320/3,908 | 272/4,435 | 208/5,305 |
| 8B–400 | 368/3,461 | 256/4,712 | 224/5,529 | 200/6,196 | 176/6,972 |
| Measurement | Included work |
| Decode replay | Captured forward, TP communication, and argmax at fixed states |
| Decode throughput | Committed tokens per summed GPU decode-service time |
| Rollout collection | Collection including prefill/re-prefill and reward scoring |
| Training iteration | Collection and learning with weight synchronization and phase switches |
| pass@ | pass@ | |||||||
| Model | Rollout | MATH-500 | OlympiadBench | MinervaMath | AIME24 | AIME25 | AMC23 | Mean |
| Qwen3-8B-Base | BF16 | |||||||
| KV8 | ||||||||
| KV4 | ||||||||
| [4pt/2pt] | KV4-RL | |||||||
| Qwen3-4B-Base | BF16 | |||||||
KV-Cache Quantization
Key-value cache quantization compresses transformer attention state to reduce memory use and bandwidth during long-context inference.
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