An Information-Geometric Framework for OCS-Reconfigurable Interconnect Topology in Large-Scale AI Clusters

Shintaro Yoshizawa

cs.DCOct 18, 2026

An Information-Geometric Framework for OCS-Reconfigurable Interconnect Topology in Large-Scale AI Clusters

Authors: Shintaro Yoshizawa

Organizations: Nagoya Mathematical and Information Science Research

Abstract

Optical Circuit Switches (OCS) make inter-pod wiring in AI clusters programmable, posing design questions on wiring choice, symmetry departure, and reconfigurations. We present a unified information-geometric framework to address these issues.A wiring is a point in a probability simplex over circuits within a degree polytope. Departure from a symmetric Fat-Tree prior $\mathbf{q}$ is measured by $\DKL(\cdot \,\|\, \mathbf{q})$ . The cost $U$ is the smoothed DAG critical-path length, whose gradient equals path marginals of a Gibbs distribution via forward--backward recursion.For free energy $F_{β_1} = U + β_1^{-1} \DKL(\cdot \,\|\, \mathbf{q})$ , we prove well-posedness, monotonic dependence on $β_1$ , adaptation bounds via Jeffreys divergence, and a symmetry principle for static optimality. An entropic proximal-gradient method updates multiplicatively with a $|V|$ -dim dual KL projection, achieving linear convergence.For time-varying traffic, a threshold policy yields regret $O(\sqrt{ΓC V_1 T})$ against the switching-free optimum. Traffic changes are detected by a multinomial GLR--CUSUM detector with non-asymptotic false-alarm bounds. Multi-job generalized-mean fairness aligns with $α$ -fairness ( $α\ge 2$ ). Experiments on pipeline, data, and MoE workloads validate the framework against integer programming.

Figures & tables

Panel of Figure 1 — Figure 1: Four views of interconnect topology. (a) A $k{=}4$ Fat-Tree with 4 pods, $(k/2)^{2}{=}4$ core switches, 8 aggregation switches, 8 edge switches, and $k^{3}/4{=}16$ hosts. All links are fixed at deployment. (b) NVIDIA Blackwell NVL72: GPUs are fully meshed within each rack via NVSwitch (blue links), and racks are interconnected through a hierarchical InfiniBand Fat-Tree reached through per-GPU NICs (red links). Only 6 of the 72 GPUs per rack are drawn. The topology is static. (c) An OCS-reconfigurable fabric realizes a logical torus (dashed orange; arrows indicate wrap-around links) whose wiring is reprogrammed per job. The thick orange circuit is an example cross-connect set inside the OCS, turning otherwise idle fibres into a long-range link. (d) Schematic information-geometric view (not to scale): wirings are points of the simplex $\mathcal{M}_{\mathrm{topo}}$ , and the degree polytope $\mathcal{W}$ is $m$ -convex. The static symmetric wiring sits at the prior; an iterate $\mathbf{w}^{*}_{0}$ outside $\mathcal{W}$ (e.g. the multiplicative step ( 15 )) is mapped back by the KL projection $\hat{\mathbf{w}}=\argmin_{\mathcal{W}}D_{\mathrm{KL}}(\cdot\,\|\,\mathbf{w}^{*}_{0})$ ( Lemma 5.1 ). Other topology families are shown only for orientation; families with different switch sets are not, in general, points of the same simplex ( Remark 3.2 ).

	$\beta_{1}\to 0$ ( $\lambda\to\infty$ )	$\beta_{1}\to\infty$ ( $\lambda\to 0$ )
Optimal wiring	$\mathbf{q}_{\mathcal{W}}$ (static symmetric prior)	min-KL minimiser of $U$ on $\mathcal{W}$
Cost $U(\mathbf{w}^{\star}_{\beta_{1}})$	$U(\mathbf{q}_{\mathcal{W}})$	$\min_{\mathcal{W}}U$
Linear rate of Theorem 5.4	fast, $(1+\eta\lambda)^{-1}$ small	slow, tends to sublinear

Table 1: Role of the inverse temperature

\beta_{1}

(cf. Theorem 4.3 ).

Fabric	$N=16$ pods, $r=8$ OCS ports/pod, $c=50$ GB/s per circuit, $b_{0}=10$ GB/s, $\mu=56$ ( $7/8$ of the ports)
Job	$S=4$ pipeline stages $\times$ $D=4$ data-parallel replicas, one pod per (stage, replica)
Compute	forward 80 ms, backward 160 ms per stage, optimiser 20 ms
Volumes	PP 3 GB per stage boundary and replica; ring all-reduce 10 GB per ring edge; MoE all-to-all $4\,\mathrm{GB}\times\max(\pi_{j},\pi_{j^{\prime}})$ between replicas $j,j^{\prime}$ of a stage, expert popularity $\pi=(0.4,0.3,0.2,0.1)$ unless stated
DAG	forward chain, backward chain, all-reduce of stage $i$ after its backward pass
Smoothing	$\tau=\tau_{s}=1$ ms; prior $\mathbf{q}$ uniform over all $\binom{16}{2}=120$ pairs

Table 2: Default experimental parameters.

Figure 2: Convergence of Algorithm 1 for

\lambda=1/\beta_{1}\in\{0.02,0.2,1\}

. (a) Objective gap (log scale). (b)

D_{\mathrm{KL}}(\mathbf{w}^{\star}\,\|\,\mathbf{w}^{k})

(solid) and the bound

\prod_{i<k}(1+\eta_{i}\lambda)^{-1}D_{\mathrm{KL}}(\mathbf{w}^{\star}\,\|\,\mathbf{q})

of Theorem 5.4 (c) (dotted, same colour).

	$\beta_{1}$	monotone	bound viol.	final gap [s]	$\|F_{\rm MD}-F_{\rm CVX}\|$
$\lambda=0.02$	50	yes	$0$	$1.5\times 10^{-4}$	$4.4\times 10^{-9}$
$\lambda=0.2$	5	yes	$0$	$9.3\times 10^{-8}$	solver failed
$\lambda=1$	1	yes	$0$	$2.2\times 10^{-10}$	$<10^{-12}$

Table 3: Checks of Theorem 5.4 (400 iterations from

\mathbf{q}

). “Bound viol.” is the largest excess of

D_{\mathrm{KL}}(\mathbf{w}^{\star}\,\|\,\mathbf{w}^{k})

over its bound; the last column is the difference to the CVXPY/Clarabel optimum.

Figure 3: Temperature sweep. (a) Smoothed iteration time of

\mathbf{w}^{\star}_{\beta_{1}}

with the static and fully adaptive levels and the bound of Theorem 4.3 (iii). (b) KL departure from the prior with the bound of Theorem 4.3 (ii) and its limit

D_{\mathrm{KL}}(\mathbf{w}^{\circ}\,\|\,\mathbf{q})

Figure 4: Integer wirings for MoE workloads: iteration time divided by the relaxation lower bound, as a function of the number of OCS ports per pod at fixed pod bandwidth.

$N$	workload	$r$	LB	Rnd	LS	MILP	$t_{\rm MD}$	$t_{\rm LS}$	$t_{\rm MILP}$
16	dense	4	1.307	1.979	1.650	1.447 (opt.)	26.4	9.4	0.09
16	dense	8	1.307	1.800	1.358	1.339 (opt.)	40.3	12.0	0.27
16	dense	16	1.307	1.326	1.314	1.314 (opt.)	27.1	18.4	0.35
16	dense	32	1.307	1.334	1.313	1.313 (opt.)	44.7	28.4	1.97
24	dense	4	1.898	2.568	2.239	2.064 (opt.)	37.5	18.3	0.22
24	dense	8	1.898	2.395	2.006	1.960 (opt.)	14.1	26.8	0.63

Table 4: Integer wirings. LB: relaxation bound; Rnd: Algorithm 1 + rounding; LS: + local search; MILP: exact (opt. = proven optimal). Times in seconds (single core, Python implementation for MD and LS).

Figure 5: Dynamic workload (

T=600

C=1

s). (a) Excess iteration time over the dynamic oracle (log scale, 9-point moving average; vertical lines: abrupt changes). (b) Cumulative excess versus number of reconfigurations for each policy family; dashed lines have constant regret

\text{excess}+CN_{T}

Policy	parameter	$N_{T}$	excess	regret
static prior $\mathbf{q}$	–	0	525.0	525.0
periodic $k$	3	199	84.1	283.1
	10	59	83.1	142.1
	30	19	129.8	148.8
	100	5	182.4	187.4
	$\infty$ (once)	0	1282.0	1282.0

Table 5: Dynamic reconfiguration: number of reconfigurations, cumulative excess over the oracle and regret

=

excess

+\,CN_{T}

(seconds; oracle total 853.7 s). Best regret per family in bold.

Figure 6: Multi-tenant OCS budget (

\mu=36

). (a) Slowdown of each job for increasing fairness exponent

p

and for a static proportional partition. (b) Maximum and mean slowdown; dotted lines show the static partition.

$\mu$	$p$	$s_{1}$	$s_{2}$	$s_{3}$	max	mean	shares $\rho$
52	1	1.114	1.062	1.063	1.114	1.080	0.26 / 0.42 / 0.32
	2	1.110	1.065	1.065	1.110	1.080	0.27 / 0.42 / 0.31
	4	1.105	1.068	1.067	1.105	1.080	0.27 / 0.42 / 0.31
	8	1.099	1.071	1.071	1.099	1.080	0.28 / 0.41 / 0.31
	$\infty$	1.084	1.081	1.080	1.084	1.082	0.30 / 0.40 / 0.30
	static partition	1.050	1.119	1.104	1.119	1.091	0.36 / 0.36 / 0.27

Table 6: Multi-tenant results: per-job slowdowns

s_{k}

, maximum and mean slowdown, and budget shares

\rho_{k}

(dense / MoE-A / MoE-B).

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Scheduling Parallel Optical Circuit Switches for AI Training

Kevin Liang, Litao Qiao, Isaac Keslassy, Bill Lin

UC San Diego · the Technion and UC Berkeley

Open paper AskPDF arXiv

The rapid growth of AI training has dramatically increased datacenter traffic demand and energy consumption, which has motivated renewed interest in optical circuit switches (OCSes) as a high-bandwidth, energy-efficient alternative for AI fabrics. Deploying multiple parallel OCSes is a leading alternative. However, efficiently scheduling time-varying traffic matrices across parallel optical switches with non-negligible reconfiguration delays remains an open challenge. We consider the problem of scheduling a single AI traffic demand matrix

D

over

s

parallel OCSes while minimizing the makespan under reconfiguration delay

δ

. Our algorithm Spectra relies on a three-step approach: Decompose

D

into a minimal set of weighted permutations; Schedule these permutations across parallel switches using load-aware assignment; then Equalize the imbalanced loads on the switches via controlled permutation splitting. Evaluated on realistic AI training workloads (GPT model and Qwen MoE expert routing) as well as standard benchmarks, Spectra vastly outperforms a baseline based on state-of-the-art algorithms, reducing schedule makespan by an average factor of

1.4\times

on GPT AI workloads,

2.7\times

on MoE AI workloads, and

2.4\times

on standard benchmarks. Further, the makespans achieved by Spectra consistently approach newly derived lower bounds.

Abstract

Communication Topology Optimization

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