cs.NEOct 19, 2026

Migrate Computation, Not Data: Fault Recovery in Neuromorphic Many-Core Systems

Authors: Muyang Cao, Di Yu, Peiling Zhu, Linshan Jiang, Xin Du, Shuiguang Deng, Gang Pan

Organizations: Zhejiang University, Hangzhou, China · Southern University of Science and Technology, Shenzhen, China

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Abstract

As neuromorphic systems scale to thousands of near-memory cores, aging-induced permanent faults in neuron-update datapaths become an important obstacle to long-term deployment. Existing online recovery methods typically retire a faulty core and migrate its neurons, along with their weights and membrane states, to healthy cores. This whole-core treatment incurs high recovery traffic and makes recovery depend on scarce destinations; at high utilization, there may be enough surviving compute capacity but insufficient free storage to copy the affected neuron context. This paper presents SpikeRelay, an online recovery framework for diagnosed compute-unit faults. SpikeRelay exploits the fact that, in many neuromorphic cores, the compute datapath, local SRAM, and router are distinct modules: a compute fault need not destroy stored weights and states or disconnect the core from the NoC. Instead of retiring a faulty core and migrating its neuron data, SpikeRelay converts the faulty core into a storage-and-forwarding node while offloading neuron-update computation to a healthy rescue core. This decoupling of storage and computation eliminates recovery-time data migration and greatly reduces spare-SRAM requirements. Consequently, SpikeRelay sustains 100% recovery at 92.2% SRAM utilization and a 50% fault rate, whereas the best baseline achieves only 22.1%.

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Figure 1. Faults are inevitable exactly where recovery has no room to move data. (a) As core count grows, the probability of at least one in-field permanent fault approaches certainty. (b) Most evaluated SNN workloads already run in the high-utilization regime ( ≥\geq 85%), leaving little spare SRAM for post-fault relocation.
Figure 2. Conventional migration retires the entire faulty core and copies all neuron data to a healthy core, causing capacity bottlenecks at high utilization while abandoning faulty-core SRAM.
Figure 3. Neuron-level impact of a stuck-at-1 fault in the compute-unit ALU. After fault onset, membrane updates diverge, threshold crossings shift, and spike displacement increases over time.
Figure 4. System model and post-fault deployment rebinding. A compute-unit fault disables only computation. SpikeRelay rebinds Tcomp\mathcal{T}_{comp} to a healthy rescue core while keeping storage and communication on the faulty core.
Figure 5. Overview of SpikeRelay. Left and middle: recovery configuration constructs the recovered pipeline via rescue-core selection, faulty-core degradation, rescue-core activation, and routing reconfiguration. Right: during online execution, the rescue core accumulates forwarded spikes, reads the state from the faulty core, performs local updates, writes the updated state back, and emits output spikes. Only computation is migrated; weights and states remain on the faulty core.
Figure 6. Recovery success rate vs. fault rate on a 32×3232{\times}32 chip across three real workloads and an extreme Dense-Stress case. SpikeRelay maintains 100% recovery on real workloads, whereas migration-based strategies degrade as utilization increases.
Figure 7. Data migration overhead vs. fault rate across the same four workloads. SpikeRelay incurs zero migration, whereas migration baselines peak and then fall as target capacity is exhausted.
Figure 8. Cycle-accurate recovery latency vs. fault rate across the same four workloads. SpikeRelay completes recovery in only tens of cycles because it sends only constant-size metadata, whereas migration baselines require 10410^{4} – 10610^{6} cycles due to bulk data movement and NoC contention.
Figure 9. End-to-end inference accuracy on CIFAR10-Conv5 under 0%–50% fault rates. SpikeRelay maintains accuracy, while migration baselines degrade as neuron loss accumulates.
ApproachData Migr.LatencyHigh-Util.Faulty SRAM
HW Redund.NoneVery lowLimitedAbandoned
Retrain / Adj.NoneOfflineLimitedAbandoned
Data Reloc.HighHighLimitedAbandoned
SpikeRelayZeroVery lowYesRetained
Table 1. Qualitative comparison of fault recovery approaches.
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