Benchmarking Model Compression Techniques Across Heterogeneous Edge Platforms: A Predictive Maintenance Use Case for Rotating Machinery

Matheus Calheira Guimarães de Oliveira; Marco Aurélio da Silva Cruz; Regis Cardoso; Lucas Cambuim; Rafael Macieira; Arthur Paim; Helaine Neves; Alex Santos

cs.LGOct 21, 2026

Benchmarking Model Compression Techniques Across Heterogeneous Edge Platforms: A Predictive Maintenance Use Case for Rotating Machinery

Authors: Matheus Calheira Guimarães de Oliveira, Marco Aurélio da Silva Cruz, Regis Cardoso, Lucas Cambuim, Rafael Macieira, Arthur Paim, Helaine Neves, Alex Santos,

Organizations: SENAI CIMATEC University, Salvador, BA, Brazil · Surrey Institute for People-Centred AI, School of Computer Science and Electronic Engineering, Faculty of Engineering and Physical Sciences, University of Surrey, Guildford, UK · SENAI Institute of Innovation in Embedded Systems, Florianópolis, SC, Brazil · UNISINOS University, São Leopoldo, RS, Brazil · Department of Statistics and Informatics (DEINFO), Federal Rural University of Pernambuco (UFRPE), Recife, PE, Brazil · Integrated Center for Advanced Security Systems, Center for Advanced Studies and Systems of Recife (CESAR), Recife, PE, Brazil · SENAI Institute for Innovation in Sensing Systems, São Leopoldo, RS, Brazil · Global Centre for Clean Air Research (GCARE), School of Sustainability, Civil and Environmental Engineering and Physical Sciences, University of Surrey, Guildford, UK · Institute for Sustainability, University of Surrey, Guildford, UK

Abstract

To enable Industry 5.0, where autonomous systems are widely adopted and integrated with people to promote sustainable development in industries, it is imperative to adapt complex deep learning models to operate efficiently on resource-constrained hardware for edge inference. However, adapting these models remains challenging due to the hardware heterogeneity of edge computing in industrial settings, performance degradation caused by model compression, and the lack of clear guidance on which compression techniques are practical and effective for applications such as predictive maintenance. To address these challenges, this paper presents a comprehensive comparative analysis of four state-of-the-art model compression techniques applied to a high-performance convolutional neural network for predictive maintenance using a real-world dataset of rotating machinery, equipment typically used in industry. The compressed models were evaluated across a heterogeneous set of nine computing platforms, ranging from highly constrained edge computing devices to general purpose and high-performance processors, reflecting the diversity and fragmentation typical of industrial edge environments. By jointly prioritizing classification performance, inference speed, and compression ratio, we found that compression using knowledge distillation emerged as the most effective approach. The model had more than 90% speedup across all devices while maintaining a 91.22% balanced F-score, with a very small drop in predictive performance relative to the uncompressed model, along with a 98.9% size reduction. Through successful deployment across multiple edge platforms and a systematic comparison of compression strategies, we demonstrated a clear path to achieving Industry 5.0 targets, drastically cutting computational costs and, consequently, energy consumption without sacrificing predictive performance.

Figures & tables

Figure 1: Methodological summary for adapting Deep Neural Networks to diverse computing devices.

Figure 2: MaFaulDa experimental setup (adapted from [ 8 ] ).

Figure 4: Student architecture of the distilled model (D-PdMCNN).

Device	Processor	Cores	Architecture	Frequency	Memory
Desktop	Intel Core i5-10400F	6	x86-64	2.90 GHz	16 GB
Laptop	Intel Core i5-11300H	4	x86-64	2.60 GHz	8 GB
HPC	Intel Xeon Gold 6148	20	x86-64	2.40 GHz	768 GB
STM32M	Dual Arm Cortex-A7	2	ARMv7-A	800 MHz	512 MB
Raspberry	Quad-core ARM Cortex-A72	4	ARMv8-A	1.5 GHz	8 GB
J. Nano	Quad-core ARM Cortex-A57	4	ARMv8-A	1.43 GHz	4 GB

Table 1: Devices used for the comparative study of DL model compression techniques.

Figure 5: Bar plot presenting the model size reduction achieved across different compression techniques relative to the baseline.

Device	Mode	Baseline	QDRI8	QF16	QI8	KD
Desktop	CPU	14.69	17.33 $\uparrow$ (18.0%)	15.13 $\uparrow$ (3.0%)	7.99 $\downarrow$ (45.6%)	0.34 $\downarrow$ (97.7%)
Laptop	CPU	7.77	10.98 $\uparrow$ (41.4%)	7.60 $\downarrow$ (2.1%)	5.81 $\downarrow$ (25.2%)	0.20 $\downarrow$ (97.5%)
HPC	CPU	7.34	12.44 $\uparrow$ (69.5%)	7.38 $\uparrow$ (0.6%)	7.47 $\uparrow$ (1.7%)	0.34 $\downarrow$ (95.3%)
STM32M	CPU	784.95	499.38 $\downarrow$ (36.4%)	772.23 $\uparrow$ (1.6%)	393.08 $\downarrow$ (49.9%)	9.96 $\downarrow$ (98.7%)
Raspberry	CPU	81.77	57.22 $\downarrow$ (30.0%)	83.68 $\uparrow$ (2.3%)	54.97 $\downarrow$ (32.8%)	1.85 $\downarrow$ (97.7%)
J. Nano	CPU	148.52	98.55 $\downarrow$ (33.6%)	150.65 $\uparrow$ (1.4%)	93.05 $\downarrow$ (37.4%)	2.58 $\downarrow$ (98.3%)

Table 2: Average inference time (ms) for each device under the different compression techniques.

\uparrow

indicates percentage growth and

\downarrow

percentage reduction relative to the baseline.

Model	F1	Prec.	Recall	Spec.	Acc.
PdM-CNN ∗	0.9481	0.9590	0.9391	0.9903	0.9852
QDRI8	0.9485 $\uparrow$ (0.04%)	0.9577 $\downarrow$ (0.13%)	0.9406 $\uparrow$ (0.16%)	0.9903	0.9852
QF16	0.9481	0.9590	0.9391	0.9903	0.9852
QI8	0.9495 $\uparrow$ (0.15%)	0.9612 $\uparrow$ (0.23%)	0.9401 $\uparrow$ (0.11%)	0.9906 $\uparrow$ (0.03%)	0.9856 $\uparrow$ (0.04%)
D-PdMCNN (KD)	0.9122 $\downarrow$ (3.79%)	0.9176 $\downarrow$ (4.32%)	0.9102 $\downarrow$ (3.08%)	0.9822 $\downarrow$ (0.82%)	0.9717 $\downarrow$ (1.37%)
D-PdMCNN ∗∗	0.7298 $\downarrow$ (23.03%)	0.8328 $\downarrow$ (13.16%)	0.7313 $\downarrow$ (22.12%)	0.9588 $\downarrow$ (3.18%)	0.9364 $\downarrow$ (4.95%)

Table 3: Comparative performance metrics of models across multiple hardware devices. Results were identical across all devices (Desktop, Laptop, HPC, STM32M, Raspberry, J. Nano, J. Orin Nano, Arduino and STM32H); Arduino and STM32H ran only the KD model. ∗ Baseline model has no compression. ∗∗ D-PdMCNN trained from scratch with randomly initialized weights. Prec. = precision, Spec. = specificity, Acc. = accuracy.

Hardware Heterogeneity

Compression Techniques

Models and Performance

Ref.

#Dev

MCU

SBC (Acc.)

Proc

#Tech

QI8

QF16

QDRI8

Prun

Clust

Compr%

PerfLoss%

DL Model(s)

[ 13 ]

1(0)

3 ∧

–

✓

–

✓

–

75–87.5%

5–24% acc

2 LSTMs

[ 14 ]

0(0)

–

✓

–

55.5–99.7%

0.72–3.25% acc

6 models

[ 15 ]

1(0)

–

✓

61.2–85.7%

0–89.8% acc

7 models

[ 16 ]

1(1)

✓

–

96.6%

0.44–1.61% acc

6 models

[ 17 ]

0(0)

–

✓

–

✓

14.2–74.6%

2.4–16.6% RMSE

LSTM, CNN

Table 4: Comparison with related works: hardware diversity, compression technique coverage, and the trade-off between performance and compression rate achieved by the proposed model, D-PdMCNN. #Dev = number of devices; MCU = microcontroller; SBC (Acc. Edge) = single-board computers (number of which are accelerated edge devices); Proc = consumer and high-performance processors; #Tech = number of techniques; KD = knowledge distillation; QI8 = 8-bit integer quantization; QF16 = Float16 quantization; QDRI8 = dynamic range quantization; Prun = weight pruning; Clust = weight clustering; Compr% = compression rate; PerfLoss% = performance loss vs. baseline; Acc = accuracy. ∧ Used hard sigmoid activation functions. ∧∧ Used depthwise separable convolution.

Model Compression

Model compression reduces the storage, computation, or latency of machine-learning models while preserving task performance.

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LLM Pruning On-Device Language Model Inference Internet of Things Structured Pruning Industrial Internet of Things

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Deploying large language models (LLMs) on Industrial Internet of Things (IIoT) edge devices demands extreme compression, yet existing structured pruning methods collapse at high compression ratios due to one-shot importance estimation, and their cross-architecture behavior remains unpredictable. This article presents a cascaded multi-granularity pruning framework that removes layers, attention heads, and feed-forward channels in coarse-to-fine order, with lightweight low-rank recovery between stages to re-estimate component importance. An information-theoretic analysis motivates this ordering, and the Structural Independence Assumption (SIA) is formalized as a checkable condition predicting whether per-component pruning criteria are reliable for a given architecture: Multi-Head Attention (MHA)+GELU designs satisfy the SIA, whereas Grouped Query Attention (GQA)+SwiGLU designs violate it. On bearing fault diagnosis spanning 88M to 6.25B-parameter models, the framework extends achievable compression to 13.8 times on MHA+GELU architectures with 83.82% accuracy (+3.70 percentage points (pp) over the strongest baseline), while exposing a ~74pp accuracy collapse on GQA+SwiGLU architectures that violate the SIA. Deployed on an industrial slewing bearing fault diagnosis platform with NVIDIA DGX Spark, compressed models reduce inference latency by up to 67.2% and peak memory by 62.5%, demonstrating viability for IIoT edge inference.

Abstract

Model Compression

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