math.DSOct 30, 2026
SaveAnalog and hybrid computing in the 21st century
Organizations: FOM University of Applied Sciences for Economics and Management, 60323 Frankfurt a. M., Germany · anabrid GmbH, 60486 Frankfurt a. M., Germany · LIX, CNRS, Ecole Polytechnique, Institut Polytechnique de Paris, 91120 Palaiseau, France · Department of Philosophy, Purdue University, West Lafayette, IN 47907, United States of America ·
Abstract
Analog computers solve problems through physical representations of mathematical variables and relations, often using the dynamics of electronic circuits and their associated signals. Many analog computers directly represent nonlinear dynamical systems; they encode their solutions in the signals that they generate. Although most modern scientific computing relies on digital architectures with inherently discrete-valued representations and algorithmic approaches, the design constraints of such architectures increasingly limit both performance and energy efficiency. Analog systems can circumvent some of these constraints; they execute specific computations very efficiently by mapping them directly onto physical processes using smaller and simpler computing elements than the ones in digital architectures. In this article, we provide an interdisciplinary perspective on modern analog and hybrid (i.e., analog-digital) computing. We discuss how modern scientific computing workflows can leverage analog approaches in various applications, such as in simulating dynamical systems, performing optimization, and enabling more energy-efficient implementations of artificial intelligence.
Figures & tables
Figure 1: An analog computer program for solving the ordinary differential equation (ODE) . The symbol with a triangle and rectangle together denotes an integrator, which performs a continuous-time integration over the sum of its inputs. (In this example, we use only one input.) For technical reasons, integrators perform an implicit sign conversion. The circle on top of the integrator gives its initial condition . For this initial condition and times , the integrator output represents the state . In the feedback loop, is multiplied by and applied to the integrator input.
Figure 2: Models of computation and the extended Church–Turing thesis. The Church–Turing thesis states that all reasonable and sufficiently powerful models of computation are equivalent in terms of computability. The effective, or extended, Church–Turing thesis asks whether this equivalence also holds at the complexity level, namely whether such models can simulate one another with at most polynomial overhead. Quantum computation is a possible boundary of this principle. While it does not change what is computable, it may change what is efficiently computable. The analogous question for analog computation is whether it remains within this complexity-level equivalence, or whether it constitutes another boundary of the Church–Turing thesis. In the case of polynomial ODEs, this question can be made precise through the length of trajectories. Polynomial-time computation corresponds to solutions of polynomial ODEs whose trajectories have polynomial length.
Figure 3: Analog crossbar circuit for solving the linear system using operational-amplifier feedback. The matrix is encoded in the cross-point conductances. The input vector is applied as voltages across input resistors of unit conductance (used for matrix scaling) at the row terminals. The row lines of the crossbar are connected to the inverting inputs of operational amplifiers, which are held at virtual ground at steady state by negative feedback. The amplifier outputs are fed back to the column lines of the crossbar, and the steady-state amplifier output voltages represent the solution vector . At steady state, Kirchhoff’s current law at each row summing node requires the net current from the crossbar and the input branch to be zero (i.e., ), yielding for invertible .
Figure 4: Schematic of biological computing approaches. (a) A single input signal applied to a homogeneous microbial population produces a deterministic output response. (b) Biological noise in heterogeneous populations generates a distribution of outputs across subpopulations. (c) Biological computing approaches range from fully engineered de novo DNA circuits (bottom-up, synthetic biology) to biological substrates of increasing complexity (top-down), spanning abiotic chemical reservoirs, population heterogeneity-based reservoirs, wild-type bacterial reservoirs, and neural/organoid computing systems.
Figure 5: One mREDAC module of the reconfigurable discrete analog computer (REDAC). The individual groups of computing and routing elements are implemented using dual inline memory module (DIMM) form factor elements. A module like this typically contains 24 integrators, 12 multipliers, 96 digitally controlled coefficents, and the necessary switch matrices for automatic reconfiguration under control of a digital computer. Figure courtesy of anabrid GmbH.
Figure 6: Representative computations on the REDAC platform across application classes, each compared against a digital reference solution. All analog data were measured on the physical device. (a) Viscous Burgers equation with a traveling shock. The analog implementation uses interior nodes across four carriers and one hardware integrator per node. We show analog (solid) and the GSL reference (dashed) velocity profiles at five times. The maximum deviation over the full window is of the unit velocity jump. The inset sweeps the mesh over , and . The speed advantage over the processor increases with , from a factor to a factor . (b) Lorenz attractor ( , , ) in the – plane. The Lyapunov exponent fitted to the analog run is . The corresponding literature value is . Analog and digital trajectories decorrelate at s, as expected for a chaotic system. (c) Gate-based quantum Fourier transform on three qubits, applied to one full period of a sinusoid across the eight basis states. We show the output-state probabilities against the exact unitary, with mean fidelity over ten realizations. The transform of that input is a line spectrum of weight at and , and the six states that should be empty carry a total leakage below . (d) Time to solution and energy per run for all four cases. The annotation gives the digital-to-analog ratio. Analog time to solution is the chip op-time and analog energy is a resource-count model, whereas the digital figures are measured wall time and measured RAPL energy. The two energy figures are therefore not like-for-like. The Burgers and quantum Fourier transform op-times were increased to achieve higher accuracy, using coefficient pre-division and a slower integration rate. Therefore, the energy of those two cases is set by the accuracy target rather than by a floor of the hardware. The digital part of the transform is the exact unitary cascade, not an integrated solver, and costs mJ; the same circuit costs mJ on the qiskit state-vector simulator. The three-qubit transform sits far below the problem size at which the analog route pays off, and is shown to mark that boundary rather than to claim an analog advantage. Figure courtesy of anabrid GmbH.
Figure 7: Prototype chip of a fully reconfigurable analog computer in 65 nm CMOS technology during characterization work in the lab. Figure courtesy of anabrid GmbH.
Figure 8: Overview of the LUCIstack across the problem-space, architecture, and microarchitecture layers. The compiler translates ODE specifications into circuit modules, the runtime manages circuit execution and protobuf-based commands, and the firmware maps these commands to the LUCIDAC hardware through SPI bitstrings. Upward-facing interfaces expose specifications between layers, while downward-facing paths carry compiled modules and runtime messages toward execution.
Figure 9: Solution of the one-dimensional heat equation. Diffusion of an initially Gaussian peak computed on the REDAC platform using 250 spatial nodes and continuous-time integration. Solid orange and dashed black lines indicate the REDAC (analog) and analytical solutions, respectively.
Figure 10: Overview of analog computing by means of elementary, transistor-based circuits. (a) Representation of circuit topology as bit-string, suitable for large-scale searching of new arrangements. (b) Simplest single-transistor configuration, (c) spiking configuration, and (d) double-scroll configuration. Panels (a)–(d) are reproduced from Ref. 155 by permission of the American Institute of Physics. (e) Conceptual framework for the design of an extended physical reservoir network based on a biological neural culture. (f) Resulting printed circuit board realization. (g) Diversity of emergent directed information flows between hubs and the rest of the network. Panels (e)–(g) are reproduced from Ref. 158 by permission of Elsevier. (h) Hypothetical scenario of distributed sensing in an agricultural internet-of-things application, and its testing in a benchtop experiment. Reproduced from Ref. 244 by permission of Elsevier. (i) Application of the reservoir network to handwritten digit recognition, through mapping the intensities of the most representative image pixels to the control voltages of the most central oscillators. Reproduced from Ref. 213 by permission of Elsevier. (j) Analog-domain integration of an EEG amplifier and single-transistor chaotic oscillator, demonstrating the generation of partial synchronization and nontrivial responses to the input. Reproduced from Ref. 81 by permission of Elsevier.
Figure 11: Conceptualization of the concept of “analog supremacy”. The vertical axis is illustrative and indicates typical timescales for digital and analog computing.