FPGA Accelerator

FPGA accelerators are hardware devices designed to significantly speed up the execution of computationally intensive algorithms, particularly in machine learning. Current research focuses on optimizing these accelerators for various neural network architectures, including transformers (like those used in large language models), convolutional neural networks, and spiking neural networks, often employing techniques like pipelining, systolic arrays, and mixed-scheme quantization to maximize throughput and energy efficiency. This work is crucial for deploying advanced AI models on resource-constrained devices like edge computers and embedded systems, enabling faster and more power-efficient applications in diverse fields such as computer vision, natural language processing, and robotics.

Papers

March 11, 2022

An Efficient Accelerator for Deep Learning-based Point Cloud Registration on FPGAs
Keisuke Sugiura, Hiroki Matsutani
Point Cloud Registration Field Programmable Gate Array Multi FPGA FPGA Accelerator

November 17, 2021

Enabling Automated FPGA Accelerator Optimization Using Graph Neural Networks
Atefeh Sohrabizadeh, Yunsheng Bai, Yizhou Sun, Jason Cong
Graph Neural Network Hardware Design Efficient Architecture High Level Synthesis FPGA Accelerator Control Flow

FPGA Accelerator

Papers

An Efficient Accelerator for Deep Learning-based Point Cloud Registration on FPGAs

Enabling Automated FPGA Accelerator Optimization Using Graph Neural Networks