Neuromorphic Computing

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Overview

Neuromorphic computing studies algorithms and physical systems that compute through neuron-like dynamics, spikes, sparse events, and sometimes sensing integrated with processing. Common approaches include spiking neural networks trained with surrogate gradients or converted from conventional networks, local learning such as spike-timing-dependent plasticity, reservoir computing, and specialized CMOS, FPGA, memristor, photonic, or analog hardware. These systems are tested on event-camera vision, speech, time-series, robotics, and edge sensing, with benchmarks such as DVS Gesture, N-MNIST, SHD, and CIFAR variants. The central challenge is turning sparse activity and device-level efficiency into reliable end-to-end gains without sacrificing accuracy, scalability, or fair comparison with conventional hardware.

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192 papers15 papers in the last four weeks, down 25% on the four weeks before. 0.1% of all new papers.

Feb 17, 2026

LAND: A Longitudinal Analysis of Neuromorphic Datasets

Neuromorphic engineering has a data problem. Despite the meteoric rise in the number of neuromorphic datasets published over the past ten years, the conclusion of a significant portion of neuromorphic research papers still states that there is a need for yet more data and even larger datasets. Whilst this need is driven in part by the sheer volume of data required by modern deep learning approaches, it is also fuelled by the current state of the available neuromorphic datasets and the difficulties in finding them, understanding their purpose, and determining the nature of their underlying task. This is further compounded by practical difficulties in downloading and using these datasets. This review starts by capturing a snapshot of the existing neuromorphic datasets, covering over 423 datasets, and then explores the nature of their tasks and the underlying structure of the presented data. Analysing these datasets shows the difficulties arising from their size, the lack of standardisation, and difficulties in accessing the actual data. This paper also highlights the growth in the size of individual datasets and the complexities involved in working with the data. However, a more important concern is the rise of synthetic datasets, created by either simulation or video-to-events methods. This review explores the benefits of simulated data for testing existing algorithms and applications, highlighting the potential pitfalls for exploring new applications of neuromorphic technologies. This review also introduces the concepts of meta-datasets, created from existing datasets, as a way of both reducing the need for more data, and to remove potential bias arising from defining both the dataset and the task.

Gregory Cohen, Alexandre Marcireau

International Centre for Neuromorphic Systems (ICNS) Western Sydney University Sydney, Australia · International Centre for Neuromorphic Systems (ICNS) The University of Manchester Manchester, United Kingdom

Neuromorphic ComputingSynthetic Data EvaluationSynthetic Data Generation
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Feb 16, 2026

Neurosim: A Fast Simulator for Neuromorphic Robot Perception

Neurosim is a fast, real-time, high-performance library for simulating sensors such as dynamic vision sensors, RGB cameras, depth sensors, and inertial sensors. It can also simulate agile dynamics of multi-rotor vehicles in complex and dynamic environments. Neurosim can achieve frame rates as high as ~2700 FPS on a desktop GPU. Neurosim integrates with a ZeroMQ-based communication library called Cortex to facilitate seamless integration with machine learning and robotics workflows. Cortex provides a high-throughput, low-latency message-passing system for Python and C++ applications, with native support for NumPy arrays and PyTorch tensors. This paper discusses the design philosophy behind Neurosim and Cortex. It demonstrates how they can be used to (i) train neuromorphic perception and control algorithms, e.g., using self-supervised learning on time-synchronized multi-modal data, and (ii) test real-time implementations of these algorithms in closed-loop. Neurosim and Cortex are available at https://github.com/grasp-lyrl/neurosim .

Richeek Das, Pratik Chaudhari

GRASP Laboratory, University of Pennsylvania

Robotics SimulationNeuromorphic Computing
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Feb 7, 2026

Physical Analogue Kolmogorov-Arnold Networks based on Reconfigurable Nonlinear-Processing Units

Kolmogorov-Arnold Networks (KANs) shift neural computation from linear layers to learnable nonlinear edge functions, but implementing these nonlinearities efficiently in hardware remains an open challenge. Here we introduce a physical analogue KAN architecture in which edge functions are realized in materia using reconfigurable nonlinear-processing units (RNPUs): multi-terminal nanoscale silicon devices whose input-output characteristics are tuned via control voltages. By combining multiple RNPUs into an edge processor and assembling these blocks into a reconfigurable analogue KAN (aKAN) architecture with integrated mixed-signal interfacing, we establish a realistic system-level hardware implementation that enables compact KAN-style regression and classification with programmable nonlinear transformations. Using experimentally calibrated RNPU models and hardware measurements, we demonstrate accurate function approximation across increasing task complexity while requiring fewer or comparable trainable parameters than multilayer perceptrons (MLPs). System-level estimates indicate an energy per inference of roughly 200 pJ and an end-to-end inference latency of roughly 0.6 μμs for a representative workload, corresponding to over 100×\times reduction in energy accompanied by >>10×\times reduction in area compared to a digital fixed-point MLP at similar approximation error. These results establish RNPUs as scalable, hardware-native nonlinear computing primitives and identify analogue KAN architectures as a realistic silicon-based pathway toward energy-, latency-, and footprint-efficient analogue neural-network hardware, particularly for edge inference.

Manuel Escudero, Mohamadreza Zolfagharinejad, Sjoerd van den Belt +2

1NanoElectronics Group, MESA+ Institute and BRAINS Center for Brain-Inspired Computing, University of Twente, P.O. Box 217, Enschede,2026 7500 AE, The Netherlands. · 2CAESUniversity GroupofandTwente,BRAINSEnschede,Center 7500for Brain-InspiredAE, The Netherlands.Computing · Institute of Physics, University of Münster, Münster, 48149 Germany.

Efficient Neural Network InferenceNeural Network Hardware AccelerationKolmogorov-Arnold NetworksNeuromorphic ComputingAnalog Computing
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Jan 21, 2026

NeuroVLA: A Brain-inspired Embodied Intelligence for Fluid and Fast Reflexive Robotics Control

Vision-language-action (VLA) models inherit powerful semantic representations from large language models, but carrying over their design priorities can leave the demands of physical control under-specified. Stable manipulation requires high-frequency proprioceptive feedback and persistent motor state, in addition to instruction understanding. Here we introduce Neuromorphic Vision-Language-Action (NeuroVLA), a brain-inspired architecture that couples a cortical vision-language planner to recurrent cerebellar modulation and a stateful spiking spinal controller. These components translate semantic intent into actions while incorporating high-frequency proprioceptive and force feedback, maintaining short-term motor memory, and enabling local responses to unexpected contact. In simulated and physical manipulation tasks, the cerebellar module reduces mean commanded jerk by 75.6%, and NeuroVLA achieves a 54.8% collision-recovery rate compared with 0.0% for the evaluated VLA baselines. The spinal controller implemented on an FPGA-based neuromorphic processor achieves 2.19 ms inference latency and 0.87 mJ per inference, corresponding to approximately 0.4 W during inference. These results motivate moving beyond inherited language-model design priorities toward embodied architectures that explicitly integrate semantic planning, high-frequency bodily feedback, motor memory, and local correction.

Weiyu Guo, He Zhang, Pengteng Li +7

The Thrust of Artificial Intelligence, The Hong Kong University of Science and Technology (Guangzhou), Guangzhou, China. · AI2 Robotics, Shenzhen, China · Shenzhen Institutes of Advanced Technology, Chinese Academy of Sciences, Shenzhen, China +1

Robotic ControlVision-Language-Action ModelsRobotic ManipulationNeuromorphic ComputingSpiking Neural Networks
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Nov 3, 2025

Online Continual Learning on Intel Loihi 2 via a Co-designed Spiking Neural Network

Edge AI must adapt to new classes and shifting data within a tight power budget, but online continual learning (learning from each sample before the next arrives) is where conventional processors are least efficient: each small update pays a full dispatch at full power. We present CLP-SNN, a spiking architecture that recasts the Continually Learning Prototypes (CLP) algorithm as event-driven neural dynamics: a self-normalizing local rule replaces CLP's global renormalization, prototype allocation becomes novelty-triggered neurogenesis, and correctness-modulated plasticity becomes reward-gated per-neuron metaplasticity. Deployed on Intel Loihi 2 as the first online continual learner on that chip, rehearsal-free CLP-SNN matches Replay and SLDA on OpenLORIS at 1-shot; at 25-shot, it stays within 0.8 percentage points of Replay and 6.2 points below covariance-based SLDA. Each prediction-and-update step on extracted features completes on-chip in 0.33 ms at 0.05 mJ, 7.3x lower latency and 341x lower energy than Replay on a Jetson Orin Nano.

Elvin Hajizada, Danielle Rager, Timothy Shea +5

Institute of Informatics, University of Munich (LMU), Munich, Germany · Intel Labs, Intel Corporation, Santa Clara, CA, USA · Southwest Research Institute, San Antonio, TX, USA +3

Online Continual LearningIncremental LearningOn-Device TrainingSpiking Neural NetworksNeuromorphic Computing
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Oct 13, 2025

Local Timescale Gates for Timescale-Robust Continual Spiking Neural Networks

Spiking neural networks (SNNs) promise energy-efficient artificial intelligence on neuromorphic hardware but struggle with tasks requiring both fast adaptation and long-term memory, especially in continual learning. We propose Local Timescale Gating (LT-Gate), a neuron model that combines dual time-constant dynamics with an adaptive gating mechanism. Each spiking neuron tracks information on a fast and a slow timescale in parallel, and a learned gate locally adjusts their influence. This design enables individual neurons to preserve slow contextual information while responding to fast signals, addressing the stability-plasticity dilemma. We further introduce a variance-tracking regularization that stabilizes firing activity, inspired by biological homeostasis. Empirically, LT-Gate yields significantly improved accuracy and retention in sequential learning tasks: on a challenging temporal classification benchmark it achieves about 51 percent final accuracy, compared to about 46 percent for a recent Hebbian continual-learning baseline and lower for prior SNN methods. Unlike approaches that require external replay or expensive orthogonalizations, LT-Gate operates with local updates and is fully compatible with neuromorphic hardware. In particular, it leverages features of Intel's Loihi chip (multiple synaptic traces with different decay rates) for on-chip learning. Our results demonstrate that multi-timescale gating can substantially enhance continual learning in SNNs, narrowing the gap between spiking and conventional deep networks on lifelong-learning tasks.

Devansh Deep, Ansh Tiwari, Ayush Chauhan

Spiking Neural NetworksOnline Continual LearningNeuromorphic Computing
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Sep 17, 2025

Circuit realization and hardware linearization of monotone operator equilibrium networks

It is shown that the port behavior of a resistor-diode network corresponds to the solution of a ReLU monotone operator equilibrium network (a neural network in the limit of infinite depth), giving a parsimonious construction of a neural network in analog hardware. We furthermore show that the gradient of such a circuit can be computed directly in hardware, using a procedure we call hardware linearization. This allows the network to be trained in hardware, which we demonstrate with a device-level circuit simulation. We extend the results to cascades of resistor-diode networks, which can be used to implement feedforward and other asymmetric networks. We finally show that different nonlinear elements give rise to different activation functions, and introduce the novel diode ReLU which is induced by a non-ideal diode model.

Thomas Chaffey

School of Electrical and Computer Engineering, University of Sydney, New South Wales, Australia

ReLU Neural NetworksNeuromorphic ComputingNeural Network Activation Functions
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Aug 28, 2025

Encoding Tactile Stimuli for Braille Recognition with Organoids

This study proposes a transferable encoding strategy that maps tactile sensor data to electrical stimulation patterns, enabling neural organoids to perform an open-loop artificial tactile Braille classification task. Human forebrain organoids cultured on a low-density microelectrode array (MEA) are systematically stimulated to characterize the relationship between electrical stimulation parameters (number of pulse, phase amplitude, phase duration, and trigger delay) and organoid responses, measured as spike activity and spatial displacement of the center of activity. Implemented on event-based tactile inputs recorded from the Evetac sensor, our system achieved an average Braille letter classification accuracy of 61% with a single organoid, which increased significantly to 83% when responses from a three-organoid ensemble were combined. Additionally, the multi-organoid configuration demonstrated enhanced robustness against various types of artificially introduced noise. This research demonstrates the potential of organoids as low-power, adaptive bio-hybrid computational elements and provides a foundational encoding framework for future scalable bio-hybrid computing architectures.

Tianyi Liu, Hemma Philamore, Benjamin Ward-Cherrier

School of Engineering Mathematics and Technology, University of Bristol, United Kingdom · School of Engineering Mathematics and Technology, University of Bristol, Bristol, United Kingdom

Neuromorphic Computing
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Jul 28, 2025

Efficient Memristive Spiking Neural Networks Architecture with Supervised In-Situ STDP Method

Memristor-based Spiking Neural Networks (SNNs) with temporal spike encoding enable ultra-low-energy computation, making them ideal for battery-powered intelligent devices. This paper presents a circuit-level memristive spiking neural network (SNN) architecture trained using a proposed novel supervised in-situ learning algorithm inspired by spike-timing-dependent plasticity (STDP). The proposed architecture efficiently implements lateral inhibition and the refractory period, eliminating the need for external microcontrollers or ancillary control hardware. All synapses of the winning neurons are updated in parallel, enhancing training efficiency. The modular design ensures scalability with respect to input data dimensions and output class count. The SNN is evaluated in LTspice for pattern recognition (using 5x3 binary images) and classification tasks using the Iris and Breast Cancer Wisconsin (BCW) datasets. During testing, the system achieved perfect pattern recognition and high classification accuracies of 99.11% (Iris) and 97.9% (BCW). Additionally, it has demonstrated robustness, maintaining an average recognition rate of 93.4% under 20% input noise. The impact of stuck-at-conductance faults and memristor device variations was also analyzed.

Santlal Prajapati, Susmita Sur-Kolay, Soumyadeep Dutta

Advanced Computing and Microelectronics Unit, Indian Statistical Institute, Kolkata 700108, India · Balasore Alloys Limited, Balgopalpur, Odisha 756020, India

Efficient Neural Network InferenceSpiking Neural NetworksNeuromorphic Computing
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May 9, 2025

Sigma-Delta Neural Network Conversion on Loihi 2

Neuromorphic computing aims to improve the efficiency of artificial neural networks by taking inspiration from biological neurons and leveraging temporal sparsity, spatial sparsity, and compute near/in memory. Although these approaches have shown efficiency gains, training these spiking neural networks (SNN) remains difficult. The original attempts at converting trained conventional analog neural networks (ANN) to SNNs used the rate of binary spikes to represent neuron activations. This required many simulation time steps per inference, which degraded efficiency. Intel's Loihi 2 is a neuromorphic platform that supports graded spikes which can be used to represent changes in neuron activation. In this work, we use Loihi 2's graded spikes to develop a method for converting ANN networks to spiking networks, which exploits temporal and spatial sparsity. We evaluated the performance of this network on Loihi 2 and compared it to NVIDIA's Jetson Xavier edge AI platform. The results show that neuromorphic approaches achieve significant improvements in efficiency and latency (energy-delay product) over existing solutions.

Matthew Brehove, Sadia Anjum Tumpa, Espoir Kyubwa +2

ChromoLogic LLC Monrovia, California, USA · Pennsylvania State University University Park, Pennsylvania, USA

Efficient Neural Network InferenceSpiking Neural NetworksNeuromorphic Computing
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Jan 30, 2025

On the Theory of Bias Tuning in Event Cameras

This paper lays the foundation of a theory for bias tuning in neuromorphic cameras, a novel sensing technology also known as "event cameras". We begin by formulating the high-level effect of the sensitivity biases on the camera's event rate in mathematical terms. We then show that, as a corollary of the Poincare-Miranda theorem, the commonly used tuning principles of rate budgeting and polarity balancing lead to a unique configuration of the sensitivity biases. As a corollary, we show how by adopting these principles, the multi-variable bias-tuning problem reduces to a two-parameter problem that can be resolved experimentally.

David El-Chai Ben-Ezra, Daniel Brisk, Adar Tal

Event-Based VisionNeuromorphic Computing
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Aug 10, 2023

Spintronics for image recognition: performance benchmarking via data-driven simulations

We present a demonstration of image classification using an extreme learning machine (ELM) based on a unique simulated magnetic tunnel junction (MTJ) delayed in time. As the ground state of the MTJ is a magnetic vortex, we refer to it as a vortex-based spin-torque oscillator (STVO). The dynamics of the magnetic vortex is simulated with a model called the data-driven Thiele equation approach (DD-TEA). This allows to avoid the constraints associated with repeated experimental manipulation for hyperparameters search and benchmarking. We showcase the versatility of our implementation by using it successfully for classification tasks on the MNIST, EMNIST-letters and Fashion MNIST datasets. Through simulations, we show that within an ELM with a sufficient number of parameters, the performance reached using the STVO dynamics as a source of nonlinearity is equivalent to the ones obtained with classical software activation functions such as the reLU and the sigmoid. While achieving state-of-the-art accuracy levels on the MNIST dataset, our model's performance on EMNIST-letters and Fashion MNIST is lower due to the simplicity of the network architecture and the increased complexity of the data. We expect that the DD-TEA framework will enable the exploration of deeper and more complex STVO-based architectures, ultimately leading to improved classification accuracy.

Anatole Moureaux, Chloé Chopin, Simon de Wergifosse +2

Institute of Condensed Matter and Nanosciences, Université catholique de Louvain, Place Croix du Sud 1, 1348 Louvain-la-Neuve, Belgium · Univ. Grenoble Alpes, CEA, CNRS, Grenoble INP, SPINTEC, 3800 Grenoble, France · Institute for Information and Communication Technologies, Electronics and Applied Mathematics, Université catholique de Louvain, Avenue Georges Lemaître 4, 1348 Louvain-la-Neuve, Belgium

Neuromorphic ComputingImage Classification
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