cs.HCJun 10, 2025
SaveImplementing Keyword Spotting on the MCXN947 Microcontroller with Integrated NPU
Organizations: Faculty of Electrical Engineering and Computing, Zagreb, Croatia
Abstract
This paper presents a keyword spotting (KWS) system implemented on the NXP MCXN947 microcontroller with an integrated Neural Processing Unit (NPU), enabling real-time voice interaction on resource-constrained devices. The system combines MFCC feature extraction with a CNN classifier, optimized using Quantization Aware Training to reduce model size with minimal accuracy drop. Experimental results demonstrate a 59x speedup in inference time when leveraging the NPU compared to CPU-only execution, achieving 97.06% accuracy with a model size of 30.58 KB, demonstrating the feasibility of efficient, low-power voice interfaces on embedded platforms.
Figures & tables
Figure 1: MFCC original signal and frames.
Figure 2: Frames after applying Hamming function.
Figure 3: Power spectrum.
Figure 4: Frames Mel spectrums.
Figure 5: MFCC spectogram.
| Layer (type) | Output Shape | Param # |
| input (InputLayer) | (None, 98, 20, 1) | 0 |
| conv1 (Conv2D) | (None, 96, 18, 32) | 320 |
| bn1 (BatchNormalization) | (None, 96, 18, 32) | 128 |
| pool1 (MaxPooling2D) | (None, 48, 9, 32) | 0 |
| conv2 (Conv2D) | (None, 46, 7, 64) | 18496 |
| bn2 (BatchNormalization) | (None, 46, 7, 64) | 256 |
Table I: Regular Neural Network Architecture
| Layer (type) | Output Shape | Param # |
| input (InputLayer) | (None, 98, 20, 1) | 0 |
| quantize_layer (QuantizeLayer) | (None, 98, 20, 1) | 3 |
| quant_conv1 (QuantizeWrapperV2) | (None, 96, 18, 32) | 387 |
| quant_bn1 (QuantizeWrapperV2) | (None, 96, 18, 32) | 129 |
| quant_pool1 (QuantizeWrapperV2) | (None, 48, 9, 32) | 1 |
| quant_conv2 (QuantizeWrapperV2) | (None, 46, 7, 64) | 18627 |
Table II: QAT Prepared Neural Network Architecture
| Layer (type) | Output Shape | Param # |
| InputLayer | [-1, 98, 20, 1] | 0 |
| Conv2D | [-1, 96, 18, 32] | 320 weights |
| + 32 biases | ||
| MUL, ADD (BatchNorm) | [-1, 96, 18, 32] | 64 scale |
| + 32 offset | ||
| MaxPool2D | [-1, 48, 9, 32] | 0 |
Table III: Quantized Model Architecture
Figure 6: Model architecture after NPU conversion [ 13 ] .
| Predicted Non-Marvin | Predicted Marvin | |
|---|---|---|
| Real Non-Marvin | 10746 | 64 |
| Real Marvin | 31 | 164 |
Table IV: Regular model confusion matrix
| Predicted Non-Marvin | Predicted Marvin | |
|---|---|---|
| Real Non-Marvin | 10501 | 309 |
| Real Marvin | 15 | 180 |
Table V: Quantized model confusion matrix
| Size [B] | Acc. [%] | i5 [ms] | MCXN947 [µs] | |
|---|---|---|---|---|
| Regular | 383674 | 99.14 | 50.67 | - |
| Quantized | 35744 | 97.06 | 0.42 | 228210 |
| NPU | 30576 | 97.06 | - | 3847 |
Table VI: Model statistics