InCoder-32B: Code Foundation Model for Industrial Scenarios
Authors: Jian Yang, Wei Zhang, Jiajun Wu, Junhang Cheng, Shawn Guo, Haowen Wang, Weicheng Gu, Yaxin Du, Joseph Li, Fanglin Xu, Yizhi Li, Lin Jing, Yuanbo Wang, Yuhan Gao, Ruihao Gong, Chuan Hao, Ran Tao, Aishan Liu, Tuney Zheng, Ganqu Cui, Zhoujun Li, Mingjie Tang, Chenghua Lin, Wayne Xin Zhao, Xianglong Liu, Ming Zhou, Bryan Dai, Weifeng Lv
Organizations: Beihang University · IQuest Research · Shanghai Jiao Tong University · ELLIS · University of Manchester · Shanghai Artificial Intelligence Laboratory · Sichuan Univeristy · Gaoling School of Artificial Intelligence, Renmin University of China · Langboat
Recent code large language models have achieved remarkable progress on general programming tasks. Nevertheless, their performance degrades significantly in industrial scenarios that require reasoning about hardware semantics, specialized language constructs, and strict resource constraints. To address these challenges, we introduce InCoder-32B (Industrial-Coder-32B), the first 32B-parameter code foundation model unifying code intelligence across chip design, GPU kernel optimization, embedded systems, compiler optimization, and 3D modeling. By adopting an efficient architecture, we train InCoder-32B from scratch with general code pre-training, curated industrial code annealing, mid-training that progressively extends context from 8K to 128K tokens with synthetic industrial reasoning data, and post-training with execution-grounded verification. We conduct extensive evaluation on 14 mainstream general code benchmarks and 9 industrial benchmarks spanning 4 specialized domains. Results show InCoder-32B achieves highly competitive performance on general tasks while establishing strong open-source baselines across industrial domains.
Figures & tables
Figure 1: Scope of industrial code intelligence. InCoder-32B aims to serve as a unified foundation model for (left) general software development and (right) industrial programming domains. The model supports a spectrum of capabilities, ranging from general coding tasks such as code generation, agentic development, and tool use to industrial workloads including chip design, GPU kernel optimization, CAD/CAM modeling, and compiler-level optimization.
Figure 2: Comparison of CUDA grid configuration strategies for RMS Normalization on large spatial dimensions (512×512). (Left) Claude assigns spatial_size (262,144) to gridDim.y, exceeding the CUDA hardware limit of 65,535, resulting in an invalid configuration argument runtime error. (Right) InCoder-32B flattens all dimensions into a 1D grid, safely utilizing the gridDim.x limit and avoiding the hardware constraint violation.
Figure 3: The three-stage training pipeline of InCoder-32B. Pre-train performs data curation and enhancement, Mid-train constructs an industrial-aware foundation with progressive context scaling from 8K to 128K, and Post-train produces simulation-grounded SFT data across industrial domains.
Figure 4: The performance of models on industrial code benchmarks.
Model
Size
EvalPlus
BigCodeBench
FullStackBench
HumanEval
HumanEval+
MBPP
MBPP+
Full
Hard
6B+ Models
DeepSeek-Coder-V2-Lite-Instruct
2.4/16B
81.1
75.6
85.2
70.6
37.8
18.9
49.4
Qwen2.5-Coder-7B-Instruct
7B
87.2
81.7
84.7
72.2
37.8
13.5
42.2
Seed-Coder-8B-Instruct
8B
81.1
75.6
86.2
73.3
44.6
23.6
55.8
Qwen2.5-Coder-14B-Instruct
14B
62.8
59.8
88.6
77.2
47.0
6.1
53.1
Table 1: Performance comparison on code generation tasks.
Model
Size
Code Reasoning
Code Efficiency
Text2SQL
CruxEval
LiveCodeBench
Mercury
Bird
Spider
Input-COT
Output-COT
V5
V6
Beyond@1
Pass@1
6B+ Models
DeepSeek-Coder-V2-Lite-Instruct
2.4/16B
57.1
56.2
13.2
19.4
76.8
91.4
41.6
72.4
Qwen2.5-Coder-7B-Instruct
7B
66.9
66.0
14.4
18.9
69.9
84.8
53.1
79.8
Seed-Coder-8B-Instruct
8B
62.0
66.6
19.2
22.3
78.5
93.8
44.7
72.7
Table 2: Combined performance on code reasoning (CruxEval, LiveCodeBench), code efficiency (Mercury), and Text2SQL (Bird, Spider) benchmarks.
Model
Size
Agentic Coding
General Tool Use
Terminal-Bench
SWE-bench Verified
Mind2Web
BFCL V3
τ2 -bench
v1.0
v2.0
Airline
Retail
Telecom
6B+ Models
DeepSeek-Coder-V2-Lite-Instruct
2.4/16B
5.0
0.0
-
26.7
-
3.5
12.0
-
Qwen2.5-Coder-7B-Instruct
7B
6.3
0.0
-
38.4
54.2
-
-
-
Seed-Coder-8B-Instruct
8B
7.5
2.5
-
38.2
-
4.3
32.0
-
Table 3: Combined performance on agentic coding tasks (Terminal-Bench v1.0, Terminal-Bench v2.0, SWE-Verified) and general tool-use tasks (Mind2Web, BFCL V3, τ2 -bench).
Model
Size
VeriScope
VeriRepair
RealBench
ArchXBench
Score
Fix (%)
System
Module
n
t
Syn@1
Syn@5
Syn@1
Syn@5
Func@1
Func@5
6B+ Models
Qwen3.5-9B
9B
32.0
0.0
0.0
0.0
6.3
15.8
4.3
8.5
1.9
44.3
GPT-OSS-20B
3.6/21B
73.9
86.7
3.8
17.4
22.9
47.9
9.8
21.0
3.1
53.5
Qwen3.5-27B
27B
55.7
60.0
6.2
20.1
17.1
33.8
10.6
17.8
2.6
48.3
Table 4: Performance on chip design benchmarks. InCoder-32B results are highlighted in gray.
Model
Size
CAD-Coder
EmbedCGen
SuperCoder
TritonBench
KernelBench
Comp.
IoU
Main (%)
Acc. (%)
Spd.
G-call (%)
G-exe (%)
T-call (%)
T-exe (%)
L1
L2
L3
6B+ Models
Qwen3.5-9B
9B
2.0
0.0
10.0
36.0
1.0 ×
2.7
100.0
3.6
100.0
0.0
0.0
2.0
GPT-OSS-20B
3.6/21B
2.0
2.0
30.6
16.0
1.0 ×
2.2
100.0
1.2
100.0
5.1
10.0
2.0
Qwen3.5-27B
27B
4.0
0.3
9.6
6.0
1.9 ×
5.4
100.0
25.9
97.7
5.1
6.0
4.0
30B+ Models
Table 5: Performance on GPU optimization, code optimization, and 3D modeling benchmarks. InCoder-32B results are highlighted in gray.
Figure 5: Error distribution of InCoder-32B across 9 industrial benchmarks. The center number indicates total failures per benchmark. Errors are color-coded by type: reds/oranges for compilation and syntax errors, blues for functional/logic errors, purples for format errors, greens for performance issues.
Figure 6: Performance across nine industrial code benchmarks as SFT data scales from 83M to 250M tokens.
Appendix figures & tables2 assets
Supplementary material from the paper’s appendix.
Appendix
Figure 7: Training loss curves for both stages of mid-training. (a) Stage 2.1 shows consistent convergence with cosine learning rate decay. (b) Stage 2.2 reflects the graduated warm-up strategy for long-sequence samples.
Industrial software development across chip design, GPU optimization, and embedded systems lacks expert reasoning traces showing how engineers reason about hardware constraints and timing semantics. In this work, we propose InCoder-32B-Thinking, trained on the data from the Error-driven Chain-of-Thought (ECoT) synthesis framework with an industrial code world model (ICWM) to generate reasoning traces. Specifically, ECoT generates reasoning chains by synthesizing the thinking content from multi-turn dialogue with environmental error feedback, explicitly modeling the error-correction process. ICWM is trained on domain-specific execution traces from Verilog simulation, GPU profiling, etc., learns the causal dynamics of how code affects hardware behavior, and enables self-verification by predicting execution outcomes before actual compilation. All synthesized reasoning traces are validated through domain toolchains, creating training data matching the natural reasoning depth distribution of industrial tasks. Evaluation on 14 general (81.3% on LiveCodeBench v5) and 9 industrial benchmarks (84.0% in CAD-Coder and 38.0% on KernelBench) shows InCoder-32B-Thinking achieves top-tier open-source results across all domains.GPU Optimization
Jian Yang, Wei Zhang, Jiajun Wu +22
Beihang University · IQuest Research · Shanghai Jiao Tong University +5
Code generation and comprehension by Large Language Models (LLMs) have emerged as core drivers of industrial intelligence and decision optimization, finding widespread application in fields such as finance, automation, and aerospace. Although recent advancements have demonstrated the remarkable potential of LLMs in general code generation, existing benchmarks are mainly confined to single domains and languages. Consequently, they fail to effectively evaluate the generalization capabilities required for real-world industrial applications or to reflect the coding proficiency demanded by complex industrial scenarios. To bridge this gap, we introduce IndustryCode, the first comprehensive benchmark designed to span multiple industrial domains and programming languages. IndustryCode comprises 579 sub-problems derived from 125 primary industrial challenges, accompanied by rigorous problem descriptions and test cases. It covers a wide range of fields, including finance, automation, aerospace, and remote sensing-and incorporates diverse programming languages such as MATLAB, Python, C++, and Stata. In our evaluation, the top-performing model, Claude 4.5 Opus, achieved an overall accuracy of 68.1% on sub-problems and 42.5% main problems. The benchmark dataset and automated evaluation code will be made publicly available upon acceptance.
Puyu Zeng, Zhaoxi Wang, Zhixu Duan +7
Shanghai Jiao Tong University, Shanghai, China · Alibaba Group, Hangzhou, China · Tsinghua University, Beijing, China
Large language models (LLMs) demonstrate strong code generation abilities in general-purpose programming languages but remain limited in specialized domains such as low-level embedded systems programming. This domain involves hardware register manipulation, vendor-specific SDKs, real-time operating system APIs, and hardware abstraction layers that are underrepresented in standard pretraining corpora. We introduce H2LooP Spark Preview, a continual pretraining (CPT) pipeline that adapts the OLMo-3-7B-a fully open language model to the embedded systems domain using BF16 LoRA with rank-stabilized scaling on 8 NVIDIA H100 GPUs. Our training corpus is constructed from repository-datasheet pairs covering 100B tokens of raw embedded systems data across 117 manufacturers, processed using the hierarchical datasheet-to-code mapping approach proposed in SpecMap (Nipane et al., 2026). The resulting curated dataset split contains 23.5B tokens across 13 embedded domains. Continual pretraining with high-rank LoRA (r=512) yields substantial gains, reducing in-domain perplexity by 70.4% and held-out repository perplexity by 66.1%. On generative code completion benchmarks spanning 13 embedded domains, our 7B model outperforms Claude Opus 4.6 and Qwen3-Coder-30B on 8 categories in token accuracy, showing that targeted continual pretraining enables smaller open-weight models to rival frontier systems on specialized technical tasks. We release the production training checkpoint on Huggingface as an open-source artifact.