Biologically Realistic Dynamics for Nonlinear Classification in CMOS+X Neurons

Steven Louis; Hannah Bradley; Artem Litvinenko; Cody Trevillian; Darrin Hanna; Vasyl Tyberkevych

cs.NEApr 3, 2026

Biologically Realistic Dynamics for Nonlinear Classification in CMOS+X Neurons

Authors: Steven Louis, Hannah Bradley, Artem Litvinenko, Cody Trevillian, Darrin Hanna, Vasyl Tyberkevych

Organizations: Department of Electrical and Computer Engineering · Oakland University, Rochester, MI USA · Department of Physics

Abstract

Spiking neural networks encode information in spike timing and offer a pathway toward energy efficient artificial intelligence. However, a key challenge in spiking neural networks is realizing nonlinear and expressive computation in compact, energy-efficient hardware without relying on additional circuit complexity. In this work, we examine nonlinear computation in a CMOS+X spiking neuron implemented with a magnetic tunnel junction connected in series with an NMOS transistor. Circuit simulations of a multilayer network solving the XOR classification problem show that three intrinsic neuronal properties enable nonlinear behavior: threshold activation, response latency, and absolute refraction. Threshold activation determines which neurons participate in computation, response latency shifts spike timing, and absolute refraction suppresses subsequent spikes. These results show that magnetization dynamics of MTJ devices can support nonlinear computation in compact neuromorphic hardware.

Figures & tables

Fig. 1: Electrical schematic illustrating two NMOS+MTJ neurons connected by a synaptic weight. Each neuron consists of a magnetic tunnel junction (MTJ), represented by the blue and orange layers, connected in series with an NMOS transistor. The synaptic connection is implemented with a voltage amplifier whose gain represents the synaptic weight

w_{kj}

that controls how activity from one neuron influences the next neuron.

V_{\textrm{in}}

is the input voltage applied to the first neuron,

V_{\textrm{out}}

is the output voltage of the second neuron, and

V_{\textrm{DD}}

is the supply voltage.

Fig. 2: Architecture of the NMOS+MTJ neural network used for XOR classification. Encoding neurons

A

and

B

drive input-layer neurons

i_{1}

and

i_{2}

, which connect to output neuron

o_{1}

through synaptic weights. A bias neuron provides a constant input to the network. The XOR truth table showing the bias input and target output.

Fig. 3: Simulation results of rows 1 and 3 of the XOR truth table. (a,e) Input currents supplied to neurons

i_{1}

and

i_{2}

. (b, f) Voltage spikes of neurons

i_{1}

and

i_{2}

. (c, g) Current supplied to output neuron

o_{1}

. (d, h) Voltage spike of output neuron

o_{1}

Fig. 4: Simulation result of row 2 of the XOR truth table. (a) Input currents supplied to neurons

i_{1}

and

i_{2}

. (b) Voltage spikes of neurons

i_{1}

and

i_{2}

. (c) Current supplied to output neuron

o_{1}

. (d) Voltage spike of output neuron

o_{1}

Spiking Neural Networks

Spiking neural networks process information through discrete, time-dependent neural events, aiming for efficient computation and biologically inspired learning.

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A Voltage-controlled MTJ-CMOS Neuron Emulating Tunable Izhikevich-Inspired Dynamics

Kayode Oluwaseyi Adebunmi, Jordan Athas, Allison Fleming, Hamed Poursiami+4

Electrical and Computer Engineering, University of Wisconsin–Madison, Madison, 500 Lincoln Dr, Madison, 53706, Wisconsin, USA. · Electrical and Computer Engineering, Northwestern University, Evanston, IL, City, 60208, State, USA. · Electrical and Computer Engineering, George Mason University, 4400 University Dr, Fairfax, Virginia, 22030, Virginia, USA.

Neuromorphic Computing Spiking Neural Networks

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Biological neurons exhibit diverse firing dynamics that enable adaptive and stimulus-dependent signalling, yet reproducing these dynamics in hardware has remained an enduring challenge. In this work, we present an Izhikevich- inspired reconfigurable neuron that co-designs voltage-controlled magnetic tunnel junction (V-MTJ) dynamics with CMOS circuitry. The proposed architecture combines V-MTJ excitability dynamics, enabled by a tunable energy landscape, with CMOS recovery dynamics to generate five distinct neuronal firing pat- terns with different spiking, bursting and response characteristics. Our results, based on measured V-MTJ characteristics and circuit simulations using com- mercial GlobalFoundries 22-nm FD-SOI CMOS technology, show an average energy consumption of 145.44 fJ per spike. Algorithmic simulations further show that these firing dynamics reduce inference spike activity by up to 88.6% while maintaining baseline classification accuracy. These results highlight the potential of V-MTJ/CMOS reconfigurable neurons to reduce computational activity and enable compact, energy-efficient brain-inspired computing systems.

Abstract

Spiking Neural Networks

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