cs.CVAug 24, 2026

Quality Inspection of Printed Circuit Board Pin Insertion via Semantic Segmentation and Board-Level Feature Extraction

Authors: Nils Rabeneck, André Kiunke, Nicole Hoess, Wolfgang Mauerer

Organizations: Technical University of Applied Sciences Regensburg Regensburg, Germany · Siemens AG, Technology Regensburg/Munich, Germany

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Abstract

Quality control during printed circuit board (PCB) assembly is a critical step in ensuring reliable electronic products. Detecting misaligned pins during or after pin insertion remains a particularly challenging inspection task. This paper presents an automated defect detection method for identifying incorrectly inserted pins on PCBs. The proposed pipeline combines semantic segmentation using a U-Net architecture with contour-based feature extraction and logistic regression for board-level pass/fail classification. Segmentation masks are used to derive contour representations of individual pins, from which board-level features -such as average contour size- are extracted and used to train a logistic regression classifier. We evaluate the method on two datasets: an industrial collection of real-world PCB images, and a publicly available PCB pin-inspection dataset with substantially different visual characteristics. To assess the effectiveness of the proposed approach, a comparison against PatchCore, an anomaly detection technique new to be applied to pin inspection, as well as instance segmentation-based pin detection is made. The developed method achieved Area Under the Receiver Operating Characteristic Curve (ROC-AUC) values of 0.990 on a random test set split from the industrial data and 1.000 on the public dataset indicating strong separation between pass and fail boards. The results indicate that the proposed approach is a promising candidate for automated pin inspection in industrial environments and achieves strong performance on datasets with substantially different visual characteristics after dataset-specific training.

Figures & tables

DatasetModelAccuracyPrecisionRecallF1-ScoreIoU
IndustrialU-Net (ResNet34)0.9950.8640.7240.7880.650
DeepLabV3 (ResNet50)0.9940.7480.8170.7810.640
FCN (ResNet50)0.9940.7520.7950.7730.630
LRASPP (MobileNetV3)0.9930.7420.7590.7500.600
RoboflowU-Net0.9810.9360.7670.8430.728
TABLE I: Segmentation Performance of the Proposed Method on the Industrial and Roboflow Datasets. Best Values on the Industrial Dataset are Highlighted in Bold
MethodClassPrecisionRecallF1-ScoreSupport
Industrial Dataset
Proposedpass1.0000.9530.976190
fail0.6541.0000.79117
PatchCorepass0.9760.8110.886148
fail0.4810.8970.62629
Roboflow Dataset
TABLE II: Classification Results of the Proposed Approach and the PatchCore Comparison Method on the Industrial and Roboflow Datasets. Best Values per Metric and Class are Highlighted in Bold
MethodClassPrec.Rec.mAP 50mAP 50:95
Industrial Dataset
Instance Seg.All0.4920.6920.5840.293
pin0.7870.8480.7840.319
pin_tilt0.1970.5350.3840.268
BBox Detect.All0.5660.6920.6780.442
pin0.8410.8910.8670.532
TABLE III: YOLO-Based Baseline Results on the Industrial and Roboflow Datasets
Fig. 1: A section of an industrial test image with the predicted mask and overlay.
Fig. 2: Distribution of the predicted pass probability for pass and fail boards. The dashed line indicates the operating threshold used for board-level classification. A logarithmic y-axis is used to improve the visibility of fail boards. The figure illustrates the observed separation between pass and fail boards achieved by the proposed method.
Fig. 3: Original image, predicted mask and overlay for an example of the Roboflow data.
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