From Splats to Silicon: Rethinking Computational Efficiency of 3DGS
Organizations: Institute of Automation, Chinese Academy of Sciences, and also with the University of Chinese Academy of Sciences · Nanjing University · Eindhoven University of Technology · School of Computer Science and Technology, Huazhong University of Science and Technology
Abstract
3D Gaussian splatting (3DGS) represents scenes with explicit primitives and supports real-time novel-view synthesis, yet its system efficiency varies substantially across scenes, viewpoints, rendering paths, and platform constraints. Existing studies pursue efficiency through representation and algorithm design, GPU runtime optimization, and architectural support, but their reported gains correspond to different points along the rendering and update paths. Connecting these indicators to end-to-end system benefit requires tracing how each optimization changes Gaussian selection, screen-space work, data movement, and stage or frame time. We therefore use a workload-centric framework to connect representation and algorithm research, GPU runtimes, and hardware architectures and to identify recurring workload patterns. We complement literature analysis with reproduced measurements and controlled GPU profiling of selected implementations, relating workload counts to stage time and memory traffic. Together, these comparisons show that system gains depend on workload reductions reaching downstream execution, granularity matching each stage, and the cost of data transfers, synchronization, and cached results, gradients, and optimizer data. Building on these findings, we discuss more consistent evaluation under rendering-quality constraints and identify key directions for future system design.
Figures & tables
| Category | Method | Mechanism | Workload | Condition |
| Representation compaction | Reducing Memory Footprint [ 37 ] | Sparse pruning + quantization | + storage bytes | Decoding and training cost, slight quality loss |
| MEGS2 [ 39 ] | SG representation + unified pruning | + storage bytes | Fine-tuning, platforms unmatched | |
| Flux-GS [ 48 ] | Energy aggregation + mobile compression | + stored bytes and traffic | Preprocessing, synchronization, thermal context | |
| Provable Pruning via Coresets [ 42 ] | Coreset pruning | Theoretical guarantee, no FPS/traffic | ||
| Compressed 3DGS [ 43 ] | Pruning + SH/VQ/entropy coding | + attribute bytes | Hardware rasterization, decoding, and QAT | |
| Compact 3DGS [ 22 ] | Masking + compact color + VQ | + attribute bytes | Small MLP, decoding, and training |
| Category | Method | Mechanism | Work unit | Effect |
| Spatial organization | FlashGS [ 13 ] | Tighter tile overlap + compact lists | Gaussian–tile pairs and lists | Reduces , sorting, and list traffic |
| Seele [ 10 ] | Preprocessing + contribution tests | Pixel candidates | Reduces low-contribution pixel work on mobile GPUs | |
| HiGS [ 16 ] | Macro-tile sort + fine-tile rasterization | Tiles, lists, and workers | Trades against and balances tasks | |
| LiteGS [ 69 ] | Block locality + optimized operators | Spatial blocks and operators | Improves locality in large-scene training | |
| LoBE-GS [ 70 ] | Balanced partitioning + visibility cropping | Scene partitions and visible Gaussians | Removes irrelevant work and balances partitions | |
| Cooperative scheduling | Balanced 3DGS [ 15 ] | Dynamic tile scheduling + warp rendering | Tiles and warps | Reduces imbalance and unit cost |
| Category | Design | Work object | Mechanism and direct effect | Coverage | Implementation | Reported resources/results |
| GPU extension | GauRast [ 25 ] | Candidates; pixel accumulators | Rasterizer extension accelerates evaluation/accumulation; Projection and Sorting remain on CUDA | Blending | RTL + post-layout; 28 nm | A: —; S: — 24 FPS ; 1.7 W |
| GBU [ 11 ] | Ordered candidates; pixel accumulators | Row-wise engine caches Gaussian attributes and keeps pixel sums local | Blending | RTL + cycle model; 28 nm | A: 0.90 mm 2 ; S: 63 KB 92 FPS ; 0.22 W | |
| Integrated GPU | Vorion [ 76 ] | Pixel accumulators; gradients | Rasterizer locally accumulates color/alpha gradients; remaining work runs on SIMT | Blending, Backward | Silicon + FPGA; 16 nm | A: 1.60 mm 2 ; S: — 6.4–19 FPS ; W |
| Dedicated accelerator | GSCore [ 14 ] | Associations; subtile candidates | Shape overlap tests/subtile masks skip uncovered work; hierarchical sorting orders retained associations | Forward | RTL + cycle/memory; 28 nm | A: 3.95 mm 2 ; S: 272 KB 91.2 FPS ; 0.87 W |
| GS-TG [ 72 ] | Neighboring tiles’ depth lists | Shared order reduces repeated sorting across tiles; rasterization remains per tile | Forward | RTL + cycle model; 28 nm | A: 3.984 mm 2 ; S: 336 KB Relative; 1.063 W | |
| FLICKER [ 77 ] | Pixel candidates; contributions | Hierarchical contribution tests and smaller tiles skip unnecessary pixel work | Forward | RTL + memory model; 28 nm | A: 3.47 mm 2 ; S: 288 KB Relative; Relative |
Appendix figures & tables2 assets
Supplementary material from the paper’s appendix.
Appendix
| Backend | Peak memory (GiB) median [min–max] | Max. absolute score difference | ||
|---|---|---|---|---|
| PSNR | SSIM | LPIPS | ||
| Graphdeco | 1.92 [1.88, 1.94] | 0.000 | 0.0000 | 0.0000 |
| gsplat | 0.97 [0.81, 0.99] | 0.036 | 0.0005 | 0.0003 |
| FlashGS | 0.94 [0.94, 0.94] | 0.076 | 0.0028 | 0.0043 |
| StopThePop | 1.96 [1.92, 1.98] | 0.001 | 0.0000 | 0.0000 |
| Speedy-Splat | 1.79 [1.75, 1.79] | 0.001 | 0.0000 | 0.0000 |