nBMS, a Neuromorphic Battery Management System with a Silicon-Validated Spiking State-of-Charge Core for eVTOL Aircraft

İsmail Can Dikmen

cs.NESep 11, 2026

nBMS, a Neuromorphic Battery Management System with a Silicon-Validated Spiking State-of-Charge Core for eVTOL Aircraft

Authors: İsmail Can Dikmen

Organizations: Department of Electrical and Electronics Engineering Istinye University, Istanbul, Turkiye

Abstract

State-of-charge (SoC) estimation for electric vertical take-off and landing (eVTOL) aircraft must run on the vehicle under hard energy and certification budgets, on a duty cycle unlike anything in the automotive literature. In this study an event-driven spiking network, the state-estimation core of the nBMS neuromorphic battery management architecture, is designed for per-timestep SoC estimation and evaluated on a public 22-cell eVTOL dataset with an automotive cross-check. A delta and population encoder, a second-order sigma-delta spiking layer, and a rate-accumulator readout hold 34{,}433 int16 parameters with zero dense multiply-accumulate (MAC) operations. The estimator reaches 2.45% root-mean-square error (RMSE) against 1.74% for a tuned long short-term memory (LSTM) baseline, a gap characterized as a temporal-mixing limit in cruise; in exchange it degrades 1.6 times slower than an adaptive leaky integrate-and-fire control under sensor noise and needs roughly 3{,}500 additions per step where the LSTM needs 67{,}700 multiply-accumulates. The full core is deployed on a low-cost automotive-qualified Artix-7 field-programmable gate array at 87% block-RAM utilization, meets timing at 50~~MHz, and reproduces the frozen fixed-point reference bit-exactly over a real 491-step flight segment on silicon. Fully annotated post-implementation analysis gives 1.30~~ $μ$ J per inference, an average of 0.65~ $μ$ W at the 0.5~Hz mission cadence.

Figures & tables

Figure 1: The nBMS state-of-charge core (top; parenthesized numerals follow the architecture blocks of [ 5 ] ), together with its recorded activity over the silicon-validated 491-step flight segment (bottom): the input traces, the 260-line encoder spike raster produced by the deployed fixed-point arithmetic, and the per-timestep SoC output. All three strip panels show real data from the validation vector, not schematic illustration.

Weights $W_{in}$ , $W_{ro}$	int16, Q1.15
Membrane states	Q13.18 (32-bit), clamp $\pm 8$
LUTs (tanh / sigmoid)	$8193{\times}16$ b / $2049{\times}16$ b
Rounding; coulomb	nearest; $\times 160{\gg}15$ (exact $/204.8$ )
Parameters / dense MACs	34,433 int16 / 0 per step

Table 1: Frozen Fixed-Point Specification (GOLD-1)

	Prim.	LOCO (5f)	Deg. @ .05	Ops/step
NS 2	2.449	$2.82\pm 0.97$	$\times 3.81$	3.5k add
ALIF	2.073	$3.26\pm 1.40$	$\times 6.23$	3.5k add
LSTM	1.736	3.203	$\times 1.62$	67.7k MAC
TCN	1.707	2.640	$\times 1.93$	149k MAC
LSTM/TCN are TPE-tuned; the spiking variants are untuned (Sec. IV-C). Degradation is on KIT. Paired eVTOL LOCO, NS 2 vs ALIF: $p{=}0.312$ ; KIT LOCO (12 folds): ALIF 11/12, $p{=}0.0015$ .

Table 2: Accuracy, Robustness, and Cost (% SoC RMSE; 5-Seed Ensembles)

Figure 2: RMSE under Gaussian input noise on all normalized channels: (a) eVTOL, (b) KIT automotive.

Figure 3: Primary-split accuracy against synaptic operations per step (5-seed ensembles); the gray staircase is the Pareto frontier.

	Core (OOC)	Board (top)
LUT	11,804 (56.8%)	10,046 (48.3%)
Flip-flops	12,503 (30.1%)	12,333
Block RAM tiles	43.5 (87%)	43.5 (87%)
DSP48	4	4
Clock / WNS	–	50 MHz / $+0.058$ ns
Cycles per step	1,227 (24.54 $\mu$ s)

Table 3: Implementation Results, xc7a35ticsg324-1L (OOC: Out of Context; WNS: Worst Negative Slack)

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A Hybrid Tucker-LSTM Tensor Network Model for SOC Prediction in Electric Vehicles

Han Wang, Ying Wang, Bing Wang

College of Computer and Information Science Southwest University Chongqing, China · School of Culture Tourism Chongqing Vocational College of Culture and Arts Chongqing, China · Digital Intelligence Center China Automotive Engineering Research Institute Co., Ltd. Chongqing, China

Long Short-Term Memory Networks

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Accurate state of charge estimation is critical for the success of electric vehicle battery management strategies, but it is well known that conventional estimators suffer from two fundamental shortcomings: cumulative errors that grow over time and reliance on simplified battery models that do not reflect real world dynamics. Therefore, this paper presents a novel hybrid approach combining Tucker tensor decomposition with LSTM networks, using full - lifecycle EV field data for SOC prediction. The inputs are charge status, mileage, voltage, current, cell differentials, and temporal features. Tucker decomposition is skillfully used to reduce dimensionality while maintaining the temporal structure, hence allowing a direct, fair comparison with standard LSTM. The result is unequivocal: Tucker - LSTM outperforms the baseline on all metrics, with MSE dropping 70.5% (from 21.07 to 6.22 ), MAE improving 48.7% (from 3.37% to 1.73%), RMSE falling from 4.59% to 2.49%, and

R^2

rising from 0.918 to 0.976. Since the experimental results demonstrably demonstrate that tensor decomposition compresses high-dimensional battery data very well without loss of predictive fidelity, this paper naturally opens up a new direction for tensor-based analytics in electric vehicle battery management.

Abstract

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