AI-Driven, Timing-Aware Power Optimization
Organizations: IEEE Member
Abstract
Post-route power recovery changes cell choices under tightly coupled timing, electrical and physical constraints, and the value of each change depends on what it costs to repair its side effects. We propose an AI-driven framework in which a learned model drives both phases of the optimization: it ranks the powerrecovery edits to try and the repair actions that follow, while deterministic electronic design automation (EDA) analyses govern every acceptance. The framework records baseline constraint margins, identifies the damage a recovery transaction introduces in each analysis view, holds pre-existing violations at their baseline rather than working them inside the power step, and caps repair spending at a fraction of the measured saving. An ensemble of gradient-boosted models predicts power change, normalized damage reduction and constraint-regression risk from action and timing-context features available before each trial; calibrated, conservative estimates feed separate acquisition scores for recovery and repair, with a deterministic fallback when the model is uncertain. Recovery and repair remain speculative until physical implementation and fresh analysis establish baseline preservation and positive net saving. We specify the contract, the learned policy, the transactional flow and a pre-registered public evaluation protocol on open designs. Evidence from a companion study on public designs supports the contract; the learned policy is proposed, and no trained-model results or proprietary design measurements are reported.
Figures & tables
| Feature group | Examples available before the trial |
|---|---|
| Action and cell | Action type, equivalent-cell class, relative drive, area, characterized leakage, Vt class delta |
| Electrical context | Input slew, output load, fanout, activity, local interconnect estimate |
| Timing context | Setup and hold margins by view, baseline targets, affected-path incidence, shared-cell count |
| Recovery history | Whether the edit restores a prior action; its recorded measurement context and trial cost |
| Search state | Current damage , remaining budget, candidate count, analysis-call allowance |
| aes constraint level | ratio | stock repair | aimed repair |
|---|---|---|---|
| Level 1 | 4.5 | 0.44 | 0.95 |
| Level 2 | between | 0.90 | |
| Level 3 | 24 | 0.63 | |
| Four designs, three levels each: aimed ahead at 10 of 12 levels, within 0.02 at 2. Caveats: at 6 of the 12 re-run levels the router failed inside the stock repair, which finished on placement parasitics (likely understating its cost); one analysis corner; hold damage did not appear on ASAP7 at these margins. | |||
| Comparison | Purpose |
|---|---|
| Existing recovery and repair flow | Reproducible conventional baseline |
| Same contract, heuristic ranking | Isolate learning from scoping and budget policy |
| Same contract, random ranking | Test whether candidate intelligence matters beyond search effort |
| Reproducible published learned sizer or RL ECO policy | Compare learning methods within compatible action spaces |
| Learned ranking without uncertainty adjustment | Measure the utility and cost of calibration |
| Learned recovery only; learned repair only | Attribute benefit to the right phase |
Electronic Design Automation
Electronic Design Automation uses algorithms and software to design, verify, optimize, and manufacture electronic circuits and systems.
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