Securing Edge & Physical AI: Post-Quantum IoT Blockchain for Mission-Critical Cyber-Physical Agents
Organizations: Department of Computer Engineering, Hacettepe University, Ankara, 06800 Turkey
Abstract
Distributed Cyber-Physical Systems (CPS) and Edge AI networks increasingly depend on public-key authentication and key-establishment mechanisms that are vulnerable to cryptographically relevant Quantum Computers (QC). Shor's algorithm threatens widely deployed asymmetric primitives, while Grover's algorithm reduces the effective security margins of symmetric and hash-based mechanisms. Although Post-Quantum Cryptography (PQC) provides a migration path, its larger public keys, ciphertexts, and signatures introduce additional computation, memory, communication, storage, and packet-fragmentation costs that can constrain dynamic multi-agent systems. In this article, we introduce rotational secrecy, an architectural objective that limits temporal key exposure through authenticated transitions between cryptographic epochs. We present Private Authentication for Rotational Secrecy (PARS), a reference mechanism that coordinates policy-triggered key establishment, rotation, and reconciliation among authorized Physical AI agents. For deployments that need distributed agreement on security state, we further develop the PARS-Enabled Edge Security Ledger (PARS-ESL), an optional permissioned architecture maintained by authorized validators or capable edge gateways. PARS-ESL does not store high-volume operational transactions. Instead, it records authenticated state for key epochs, group membership, revocation, algorithm-suite policies, challenge validation, and recovery checkpoints. As a result, resource-constrained agents can take part as lightweight clients, and low-latency operational traffic stays outside the ledger consensus path, protected by the currently active symmetric epoch keys. Our results show that ledger-assisted post-quantum key-epoch management is feasible for selected Edge AI and CPS security-control workloads under the stated trust, compromise, connectivity, and resource assumptions.
Figures & tables
| Type | Methodology | Pros & Cons | Target | Contribution | Status |
|---|---|---|---|---|---|
| S-QM | • Intertwined Architecture for IoT, BC and QCMPs • Identity Management Mechanism • Data Integrity Before Storage • Heterogeneity Gateway Support Among Edges • Data Transfer Over Quantum Distributed Ledger | Pros: • Ensuring Data Integrity Before Storage • Facilitates Decentralization in IoT • Focuses IoT Resource Limitation Cons: • Depends on Quantum Computers | IoT [ 70 ] | • Propose Multilevel Distributed-Ledger • Integration Support for Heterogeneous Edges • Building Secure IoT Applications with BC and QCMPs | Empirical |
| • Quantum Communication Infrastructure • Information Processing with Blockchain • Quantum-Reflection Key Distribution Protocol | Pros: • No Need for Qubits • Traditional Device Compliance • Resist Various Attacks • High Computational Efficiency • High Level of Practicability Cons: • Lack of Native Quantum Resistance • Implementation Difficulty • Complex Infrastructure Cost | IoV&IoT [ 71 ] | • Two Novel Lightweight Quantum-Reflection Protocols • Reduced Communication Rounds • Overcome Rare Q-Bits • Offering Compatibility for Traditional Device | Theoretic Notional | |
| • Quantum Key Distribution • Secure Authentication Algorithm | Pros: • Anonymity of Network Peers • Supports Large Scale Blockchains Cons: • Lack of Attack Mitigation Analysis • Lack of Technical Details • Lack of Functional Supremacy | Generic [ 72 ] | • Efficient Blockchain for Quantum Attacks • Experimental Realization | Notional Empirical | |
| • Usage of QDS and QM • Consensus Algorithm • Entanglement Operations | Pros: • Weighted Graph States • Undeniability of Nodes • Resistant to Hash Rate Attacks • Solves Heterogeneity Problem • Resource Friendly • Lower Computation Volume • Wide-Spectrum of Applicability Cons: • Technically Challenging • Complex Architecture | Generic [ 73 ] | • Present Higher Efficiency • Novel Consensus Mechanism | Theoretic Empirical | |
| • Quantum-native chain via temporal GHZ states • Entanglement-in-time block links | Pros: • Past blocks physically tamper-proof • Subcomponents experimentally realizable Cons: • No implementation needs quantum network • No key rotation | Generic [ 69 ] | • Pioneering quantum-native blockchain concept | Conceptual | |
| • Quantum-blockchain framework for EMRs • Quantum-authenticated transactions | Pros: • Privacy-preserving EMR sharing • Quantum-secured integrity Cons: • Assumes quantum channels • No key rotation | IoMT [ 83 ] | • Quantum-BC framework for private EMRs in IoMT | Theoretical |
| Type | Methodology | Pros & Cons | Target | Contribution | Status |
|---|---|---|---|---|---|
| S-PQCL | • Lattice Based Delegation Algorithm • Double Signature Design • Preimage Sampling Algorithm | Pros: • Reduced Correlation Between Message and Signature • Shorter Signature and Key Size • Decreased Computational Complexity • Higher Security and Efficiency • Resist Various Attacks Cons: • Implementation Complexity and Time • Lack of Security Analysis • Lack of Quantum Effects on Financial Backbone | Finance [ 80 ] | • Novel Signature Schema • Quantum Secure Cryptocurrency Architecture | Theoretic |
| • Lattice Based Encryption Architecture | Pros: • Reduced Communication Cost • Ensure Forward Security • Resist Private Key Attacks • Higher Efficiency • Lower Execution Time Cons: • Reduced Trapdoor • Complex Notation Flow for Security Analysis • Possible Backdoors | Health [ 82 ] | • BC Based Searchable Encryption Schema for QAs • Solving Key Leakage Problem • Robust Ontological Backbone for Healthcare | Theoretic Empirical | |
| • Lattice RingCT (Module-SIS/LWE) • Efficient PQ private payments | Pros: • Compact proofs vs prior lattice RingCT • Confidential transactions Cons: • Heavier than classical (ECC) RingCT • No key rotation | Finance [ 81 ] | • Efficient post-quantum private blockchain payments (IEEE S&P) | Empirical |
| Type | Methodology | Pros & Cons | Target | Contribution | Status |
|---|---|---|---|---|---|
| S-PQC | • PARS Protocol (Rotational Secrecy) • PoE Consensus Mechanism • Layer-1 Private Quantum Blockchain • Light Node Executive Architecture | Pros: • Algorithm-agnostic (modular structure) • High energy efficiency • Low storage footprint • Robust quantum attack mitigation • Optimized for edge hardware • Strong empirical baseline Cons: • Lacks holistic empirical • Performance metrics • (deferred to this study) • Coordination overhead for pattern consensus | IoMT& Military& Generic [ 35 ] | • Proposes Layer-1 Blockchain for military systems • Dynamic key reconciliation for tactical swarms • Introduces novel PoE consensus • Comprehensive benchmark of NIST PQC candidates | Empirical |
| • Lattice Based DSA Blockchain • IPFS | Pros: • Lower Transaction Size • Increased Performance • Optimized Block Size in Traditional Architectures Cons: • Limitations for Parallel Transactions • Lack of Performance and Scalability Analysis | Generic [ 74 ] | • Propose Quantum-Resistant DSA Based Blockchain • Plan to Resist Quantum Attacks by qTesla • Ensure Higher Number of Transactions | Empirical | |
| • Novel Quantum PoW Consensus Mechanism | Pros: • Solve Random Quadratic Equations • Enhanced Security • Higher Transaction Amount Cons: • Holds Possible Back Doors of Rainbow | Generic [ 39 ] | • Memory Mining Capabilities • Reduce Validity Concerns on Transactions • Efficient Block Expansion | Theoretic Empirical | |
| • Conditional Privacy-Preserving Authentication • Lattice Based Architecture • Authentication Algorithm | Pros: • Energy and Storage Efficiency • Lower Computation Cost • Rich Set Amount Attacks Mitigation Capability • Rich Set Amount Attacks Mitigation Capability • Sophisticated Security Functionalities • Strong Analytical Analysis Cons: • Loosely Correlated Cost Results • Loosely Correlated Proofs • Complex Model for Implementation Phase | IoV& IoT [ 75 ] | • Propose Quantum-Resistant Authentication Schema • Reliable Consortium Blockchain for Data Management • Enhance Security Functionalities of Literature | Notional Theoretic Empirical | |
| • Quantum-Safe XMSS • Novel Mining Algorithm • Key Migration from Old to XMSS Based Keys • W-OTS+ Schema for Avoiding One-Time • Non-Interactive ZKP for Privacy | Pros: • Lack of Transaction Malleability • Suitable for Lightning Network • Protected Network Efficiency • Burn Operation for Non-Migrated Coins Cons: • Extended XMSS Signature Migration is Required • Mix of Classical Approaches like Equihash, SHA3 • Higher Witness Scale Factor | Finance [ 77 ] | • Quantum-Safe Cryptocurrency Schema • Serves for Avoiding Possible Defects of Bitcoin for QAs | Theoretic Notional | |
| • Multi-sensor input fusion (RF/IR/radar/RGB) • Post-Quantum Cryptography (Kyber/Dilithium2) • YOLOv8, Swin-T, and Quantum Variational Classifier | Pros: • On-device threat detection and active response • Low average inference latency (52.9 ms) • High accuracy (F1-score of 90.0) Cons: • High local computational/thermal demand • Heavy hardware requirements for multimodal execution | Edge AI Surveillance [ 92 ] | • Proposes first fully integrated, PQC-secure Edge AI threat mitigation platform (Karana) • Hardware-validated on NVIDIA Jetson architectures | Empirical |
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| CNRME Encapsulation |
| CNRME Key Derivation |
| Algorithm | Security Level | Key Pair | Enc e /Sign f | Dec e /Verify f | Scheme Type | Attack/Mitigation |
| BIKE e,d | 256 – 128 (bits) | 0.001458s | 0.000099s | 0.009767s | Code Based | Structural Attacks |
| Key Recovery Attacks | ||||||
| Squaring Attacks | ||||||
| Power Analysis Attack | ||||||
| Side Channel Attacks | ||||||
| Reaction Attacks |
| Platform | Compute core(s) | Accel. path | Lattice (KEM/DSA) | Hash (SLH-DSA) |
| Jetson Orin | Cortex-A78AE + Ampere GPU | NEON / GPU | 2.5–4 (CPU); 1 batched | 1.5–3 (crypto ext.) |
| Jetson AGX Orin Ind. | Hardened Cortex-A78AE + GPU | NEON / GPU (ECC) | 2.8–4.5 (CPU); 1.1 batched | 1.6–3.3 (crypto ext.) |
| Jetson Nano | Cortex-A57 + Maxwell GPU | NEON (no crypto ext.) | 12–18 | 25–40 |
| i.MX RT1064 (MCU) | single Cortex-M7 @600 MHz | assembly only | 1–2 ms/op (ML-KEM-768); 5–15 ms ML-DSA-65 sign [ 121 ] | impractical for fast re-keying |
| TI Sitara AM69x | 8 Cortex-A72 @2 GHz + R5F + HSM | NEON / SW parallel + HSM | 3.5–5.5 (projected) | 2–3.5 (projected) |
| PolarFire SoC (RISC-V) | quad RISC-V U54 (in-order, 64-bit) | none | 20–45 (projected) | several seconds (projected) |
| Platform | ML-KEM | ML-DSA | SLH-DSA | FN-DSA / HQC | Primary support path |
| Intel i5-12450H (baseline) | SW | SW | SW | draft (liboqs) | OpenSSL 3.5 / liboqs (AVX2) |
| Jetson Orin | GPU, SW | GPU, SW | SW | draft (liboqs) | cuPQC + OpenSSL 3.5 (NEON/Ampere) |
| Jetson AGX Orin Ind. | GPU, SW | GPU, SW | SW | draft (liboqs) | cuPQC + OpenSSL 3.5 (rugged ECC) |
| Jetson Nano | GPU, SW | GPU, SW | SW | draft (liboqs) | cuPQC + OpenSSL 3.5 (NEON) |
| i.MX RT1064 (MCU) | asm, IP | asm, IP | verify (IP) | draft | pqm4 + PQMicroLib ( 5 KB) |
| TI Sitara AM69x | SW, HSM | SW, HSM | SW, HSM | draft (liboqs) | OpenSSL 3.5 + HSM PQC extensions |
| Data Flow Class | Operational Transfer Profile | Cryptographic Pattern | PQC Per-Object Overhead & Steady-State Cost |
|---|---|---|---|
| Sensor / Streaming Imagery | Large volume, continuous streaming, soft real-time constraint. | ML-KEM-768 AEAD bulk stream; ML-DSA-65-signed keyframes. | 2.3 KB per session (ek + ct) 3.3 KB keyframe signature; 16 B tag per packet. |
| Federated Learning Updates | Periodic batch transfer, MB-scale parameter tensors, delay-tolerant. | ML-DSA-65-signed model tensors over established KEM channel. | 3.3 KB update signature ( 1% of an MB-scale tensor); negligible relative overhead. |
| Telemetry / C4ISR Control | Small payload, high-frequency broadcast, hard real-time constraint. | ML-KEM-512 / ML-DSA-44 symmetric AEAD stream. | 1.6 KB per session (ek + ct) 2.4 KB key signature; 16 B tag per packet. |
| Configuration Database | Infrequent synchronization, KB–MB scale, integrity-critical. | ML-DSA-65/87-signed snapshot manifests and state hashes. | 3.3–4.6 KB per snapshot signature; amortized across rare sync events. |
| Software / Firmware (OTA) | Rare distribution, large image size, very high integrity requirement. | Stateful LMS/XMSS ( ) or ML-DSA-87, offline signed ⋆ . | 1.5–2.5 KB per image (LMS/XMSS) or 4.6 KB (ML-DSA-87); 7.9 KB (SLH-DSA-128s). |
| Analysis / Mission Logs | Variable batch size, archival storage, provenance-critical. | ML-DSA-87 or SLH-DSA-128s timestamped state hash ⋆ . | 4.6–7.9 KB per record batch signature; long-term tamper-evident proof. |
| Data Flow Class | Primary Target Substrate | PARS-ESL Architectural Role | Key Epoch Management & Rekeying Trigger |
|---|---|---|---|
| Sensor / Streaming Imagery | GPU / AI Engines (Inference) Spatial PL Fabric (AEAD Bulk) | Negotiates ephemeral session keys via PARS; records state anchors on ESL. | Time-Based (TB) Periodic Security Threshold Control (PSTC) windowed re-keying. |
| Federated Learning Updates | GPU / AI Engines (Tensors) Host Processing System (PS) | Provides ledger-anchored model provenance; validates client updates immutably. | Windowed re-keying aligned with federated learning round completion epochs. |
| Telemetry / C4ISR Control | Deterministic PL Datapaths Real-Time Cores (e.g., Cortex-R5F) | Enforces low-latency authentication filters with minimal memory footprint. | Action-Based (AB) / Group-Based (GB) threshold triggers upon operational state shift. |
| Configuration Database | Host Processing System (PS) Secure Enclave / Flash Storage | Maintains versioned, immutable configuration snapshot roots on-chain. | Event-driven reconciliation upon policy update or node group reconfiguration. |
| Software / Firmware (OTA) | Parallel PL Keccak Engines (Verify) Hardened RoT Enclave | Writes immutable release image hashes and verification receipts to the ledger. | Offline signed; validated on boot/update prior to key epoch transition. |
| Analysis / Mission Logs | Host PS Core High-Throughput PL Cryptographic Hashing | Commits archival root hashes to ESL for post-mission auditing and traceability. | Continuous epoch-stamped logging decoupled from live command channels. |
| Operational Scenario | Target Hardware Platform | Swarm Size | KEM Choice | DSA Choice | ZK Level | PSTC Configuration |
| Peacetime Base Security / C2 | NXP i.MX RT1064 (Cortex-M7 MCU) | 4 nodes | ML-KEM-512 | ML-DSA-44 | Level 1 | 60 min (TB, Low Footprint) |
| Low-Power Tactical Comms | Microchip PolarFire SoC (RISC-V + PL) | 8 nodes | ML-KEM-512 | ML-DSA-44 | Level 2 | 30 min (TB, Power-Optimized) |
| Civilian Edge Logistics Swarms | NVIDIA Jetson Nano (Cortex-A57 Base) | 8 nodes | ML-KEM-768 | ML-DSA-65 | Level 1 | 30 min (TB, Software EVP Path) |
| Active Tactical Mobile Maneuvers | AMD/Xilinx Zynq-7000 (Cortex-A9 + PL) | 12 nodes | ML-KEM-768 | ML-DSA-65 | Level 2 | 15 min (AB, Spatial PL Acceleration) |
| Tactical Drone Swarm | TI Sitara AM69x (Cortex-A72 + HSM) | 12 nodes | ML-KEM-768 | ML-DSA-65 | Level 2 | 15 min (AB, Real-time Isolated) |
| Tactical Recon Radar | Altera Agilex 9 Direct RF (Cortex-A53 + PL) | 12 nodes | ML-KEM-768 | ML-DSA-65 | Level 2 | 15 min (AB, Direct-RF Mode) |
| Operational Tier | Target Platform | Compute Architecture & Substrate | PQC Support Status & Primary Path | Key Architectural Pros (Advantages) | Key Constraints & Cons (Trade-offs) | Applied Protocol Paradigm | Recommended Algorithm Suite |
|---|---|---|---|---|---|---|---|
| Gateway / GCS | Intel Core i5-12450H (GCS Baseline) | 8C/12T @ 3.20 GHz (64 GB DDR4) | Full PQC (Native) OpenSSL 3.5 / liboqs (AVX2 Vectorized) | High raw throughput, native AVX2 SIMD acceleration, full support for stateful and stateless post-quantum schemes. | High active power draw (45–95 W), bulky form factor, unsuited for SWaP-constrained field or airborne platforms. | Full PQC Node (PARS-ESL Root / Validator) | ML-KEM-1024 / SLH-DSA-128s ZKP Lvl 4, Continuous / Event |
| Strategic Space & Orbital AI | AMD XQR Versal (Space Adaptive SoC) | Rad-Hard Cortex-A72 + TMR-Hardened PL + AIE | Full PQC (Accelerated) Hardened PL Cores + PS OpenSSL 3.5 | MIL-PRF-38535 Class B space-flight qualified, TMR-hardened spatial PL eliminates SEUs, AI Engines isolate orbital vision pipelines. | High unit procurement cost, steep learning curve for AI Engine graph programming and spatial routing toolchains. | Full PQC Node (Mode A, Accelerated) | ML-KEM-1024 / ML-DSA-87 ZKP Lvl 4, PSTC: 5–10 min (GB) |
| Microchip PIC64-HPSC (NASA Space MPU) | 8 SiFive X280 @ 1.0 GHz (512-bit Vector RVV) | Full PQC (Accelerated) 512-bit RVV ISA + Hardened Enclave | 512-bit vector registers accelerate polynomial NTT loops without discrete FPGA fabric, Secure Enclave provides a hardware RoT. | Emerging RISC-V space software ecosystem, non-reconfigurable logic (fixed ISA), early-stage RVV auto-vectorizing compilers. | Full PQC Node (Mode A, Vectorized) | ML-KEM-1024 / ML-DSA-87 ZKP Lvl 4, PSTC: 5–10 min (GB) | |
| Microchip RT PolarFire (Rad-Tolerant RISC-V) | Quad SiFive U54 (64-bit) + Flash-FPGA Fabric | Full PQC in PL / Hybrid Custom PL Core + RISC-V Linux | Non-volatile flash FPGA is inherently immune to configuration memory SEUs (no scrubber needed), lowest static power ( 3 W). | In-order 64-bit RISC-V application cores exhibit severe software-only execution penalties without custom PL accelerator cores. | Full PQC (PL Mode A) / Classical (PS Mode B) | ML-KEM-512 / ML-DSA-44 ZKP Lvl 2, PSTC: 30 min (TB) | |
| Tactical Defense & Electronic Warfare | Altera Agilex 9 (Direct RF SoC FPGA) | Quad Cortex-A53 (HPS) + Direct RF PL (64 Gsps) | Full PQC (Accelerated) Direct-RF PL + Secure Device Manager | Direct RF sampling (up to 64 Gsps) enables real-time spectral EW integration, Secure Device Manager (SDM) enforces PQC boot. | High static/dynamic power draw (25–50 W), requires advanced conduction cooling enclosures in sealed tactical missile/pod bays. | Full PQC Node (Mode A, Direct RF) | ML-KEM-768 / ML-DSA-65 ZKP Lvl 2, PSTC: 15 min (AB) |
| AMD Versal AI Edge Gen 2 (Commercial SoC) | Cortex-A78AE + R52 Cores + Expansive PL + AI Engines | Full PQC (Accelerated) PL IP Cores + PS OpenSSL 3.5 | High functional safety (ASIL-D / SIL-3), optimal workload partitioning across dual real-time cores, application complex, and vector engines. | Power budget (10–25 W) exceeds ultra-low SWaP drone batteries, complex AXI interconnect bus arbitration under heavy multimodal load. | Full PQC Node (Mode A, Accelerated) | ML-KEM-1024 / ML-DSA-87 ZKP Lvl 3, PSTC: 5–10 min (GB) |