Gated Delta Networks
Overview
Gated Delta Networks process sequences by repeatedly updating a fixed-size matrix state: delta-rule updates write new information while gates regulate what is retained or erased. Chunkwise and WY-style algorithms parallelize training, while recurrent decoding offers linear sequence cost and constant-size state instead of growing a full attention cache. Current work explores finer-grained erase and write controls, normalized update steps, larger or structured memories, and hybrids with attention; evaluations often focus on language modeling, associative recall, and long-context retrieval benchmarks such as needle-in-a-haystack tasks. A central challenge is balancing memory capacity and retrieval accuracy against efficiency, while keeping recurrent states numerically stable and reliable beyond the training context length.
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