Neural Network Hardware Acceleration

Latest papers

37 papers7 papers in the last four weeks, up 40% on the four weeks before. 0.0% of all new papers.

BiKA: Kolmogorov-Arnold-Network-inspired Ultra Lightweight Neural Network Hardware Accelerator
Feb 26, 2026Yuhao Liu, Salim Ullah, Akash KumarNeural Network Hardware Acceleration Efficient Neural Network Inference
Ruhr University Bochum, Germany · Dresden University of Technology, Germany · Center for Scalable Data Analytics and Artificial Intelligence (ScaDS.AI Dresden/Leipzig), Germany
GRAU: A Generic Runtime-Reconfigurable Activation-Requantization Unit for Quantized Neural Network Accelerators
Feb 25, 2026Yuhao Liu, Salim Ullah, Akash KumarNeural Network Hardware Acceleration Neural Network Activation Functions
Ruhr University Bochum, Germany · Dresden University of Technology, Germany · Center for Scalable Data Analytics and Artificial Intelligence (ScaDS.AI Dresden/Leipzig), Germany
HAWX: A Hardware-Aware FrameWork for Fast and Scalable ApproXimation of DNNs
Feb 18, 2026Samira Nazari, Mohammad Saeed Almasi, Mahdi Taheri +4Neural Network Hardware Acceleration Neural Network Optimization
University of Zanjan, Zanjan, Iran · Brandenburg Technical University, Cottbus, Germany · Tallinn University of Technology, Tallinn, Estonia +1
Physical Analogue Kolmogorov-Arnold Networks based on Reconfigurable Nonlinear-Processing Units
Feb 7, 2026Manuel Escudero, Mohamadreza Zolfagharinejad, Sjoerd van den Belt +2Efficient Neural Network Inference Neural Network Hardware Acceleration
1NanoElectronics Group, MESA+ Institute and BRAINS Center for Brain-Inspired Computing, University of Twente, P.O. Box 217, Enschede,2026 7500 AE, The Netherlands. · 2CAESUniversity GroupofandTwente,BRAINSEnschede,Center 7500for Brain-InspiredAE, The Netherlands.Computing · Institute of Physics, University of Münster, Münster, 48149 Germany.
BitLogic: Training Framework for Gradient-Based FPGA-Native Neural Networks
Feb 7, 2026Simon Bührer, Andreas Plesner, Aczel Till +1Efficient Neural Network Inference FPGA-Based Neural Network Acceleration
ETH Zurich · Zurich, Switzerland
KernelEvolve: Scaling Agentic Kernel Coding for Heterogeneous AI Accelerators at Meta
Dec 29, 2025Gang Liao, Hongsen Qin, Ying Wang +36GPU Kernel Optimization GPU Acceleration
KernelEvolve Team, Meta Platforms
NeuroFlex: Lossless Element-Level ANN-SNN Co-Execution for Efficient Sparse Inference
Nov 7, 2025Varun Manjunath, Pranav Ramesh, Gopalakrishnan SrinivasanEfficient Neural Network Inference Spiking Neural Networks
Electrical Engineering Indian Institute of Technology Madras Chennai, India · Computer Science and Engineering Indian Institute of Technology Madras Chennai, India

Feb 26, 2026J/K move · Enter open · S save

BiKA: Kolmogorov-Arnold-Network-inspired Ultra Lightweight Neural Network Hardware Accelerator

Yuhao Liu, Salim Ullah, Akash Kumar

Ruhr University Bochum, Germany · Dresden University of Technology, Germany · Center for Scalable Data Analytics and Artificial Intelligence (ScaDS.AI Dresden/Leipzig), Germany

Neural Network Hardware Acceleration Efficient Neural Network Inference FPGA-Based Neural Network Acceleration Binary Neural Networks Edge Computing

Open paper AskPDF arXiv

Lightweight neural network accelerators are essential for edge devices with limited resources and power constraints. While quantization and binarization can efficiently reduce hardware cost, they still rely on the conventional Artificial Neural Network (ANN) computation pattern. The recently proposed Kolmogorov-Arnold Network (KAN) presents a novel network paradigm built on learnable nonlinear functions. However, it is computationally expensive for hardware deployment. Inspired by KAN, we propose BiKA, a multiply-free architecture that replaces nonlinear functions with binary, learnable thresholds, introducing an extremely lightweight computational pattern that requires only comparators and accumulators. Our FPGA prototype on Ultra96-V2 shows that BiKA reduces hardware resource usage by 27.73% and 51.54% compared with binarized and quantized neural network systolic array accelerators, while maintaining competitive accuracy. BiKA provides a promising direction for hardware-friendly neural network design on edge devices.