High-Level Synthesis (HLS) compiles C/C++ into RTL, but exploring pragma-driven optimization choices remains expensive because each design point requires time-consuming synthesis. We propose \DiffHLS, a differential learning framework for HLS Quality-of-Result (QoR) prediction that learns from kernel--design pairs: a kernel baseline and a pragma-inserted design variant. \DiffHLSencodes kernel and design intermediate-representation graphs with dedicated graph neural network (GNN) branches, and augments the delta pathway with code embeddings from a pretrained code large language model (LLM). Instead of regressing absolute targets directly, we jointly predict the kernel baseline and the design-induced delta, and compose them to obtain the design prediction. On PolyBench, \DiffHLSattains lower average MAPE than GNN baselines under four GNN backbones, and LLM code embeddings consistently improve over a GNN-only ablation. We further validate scalability on the ForgeHLS dataset.
Figures & tables
Fig. 1: Overview of DiffHLS . We encode kernel and design IR graphs, inject LLM code embeddings into the delta pathway, and predict the kernel baseline and delta; finally the design prediction is obtained by composition.
Fig. 2: Example kernel code (top) and design code (bottom) illustrating HLS pragma insertion.
[min, max]
Kernel
Delta
Design
DSP
[3, 29]
[ − 7, 75]
[5, 94]
FF
[495, 3994]
[ − 174, 25414]
[1296, 28967]
LUT
[1214, 5192]
[151, 35865]
[1842, 39464]
CP
[5.31, 7.21]
[ − 0.10, 0.78]
[5.55, 7.75]
TABLE I: Target value ranges (kernel, delta, design).
Backbone
Method
DSP
FF
LUT
CP
PNA
GNN [ 1 ]
14.71
26.47
22.86
8.87
HGNN [ 2 ]
7.84
9.65
10.55
-
DiffHLS
3.63
8.18
5.52
1.34
GraphSAGE
GNN [ 1 ]
17.01
39.11
28.09
8.25
HGNN [ 2 ]
6.94
9.99
9.86
-
DiffHLS
3.31
7.34
5.12
1.06
TABLE II: QoR prediction accuracy under different GNN backbones.
Backbone
Method
DSP
FF
LUT
CP
MAPE ↓
MAE ↓
R2↑
MAPE ↓
MAE ↓
R2↑
MAPE ↓
MAE ↓
R2↑
MAPE ↓
MAE ↓
R2↑
PNA
DiffHLS (w/o diff)
3.86
1.16
0.980
10.75
725.94
0.972
8.50
891.66
0.969
1.22
0.090
0.711
DiffHLS (w/o code emb.)
4.18
1.39
0.976
8.51
677.34
0.963
6.30
641.35
0.967
1.22
0.090
0.735
DiffHLS
3.63
1.21
0.899
8.18
629.84
0.973
5.52
627.03
0.989
1.34
0.099
0.710
GraphSAGE
DiffHLS (w/o diff)
4.19
1.25
0.971
10.60
680.01
0.926
7.76
707.05
0.935
1.31
0.096
0.679
DiffHLS (w/o code emb.)
5.11
1.81
0.945
8.64
698.86
0.974
5.78
576.78
0.991
1.24
0.092
0.721
TABLE III: Ablation study: differential vs. direct prediction and effect of code embeddings.
Head
Backbone
Code Emb.
DSP
FF
LUT
CP
MAPE
MAE
R2
MAPE
MAE
R2
MAPE
MAE
R2
MAPE
MAE
R2
Kernel y^k
PNA
No
0.43
0.08
1.000
0.74
15.53
0.999
0.55
13.36
1.000
0.06
0.004
0.993
Yes
0.84
0.12
0.999
0.66
15.08
1.000
0.38
8.81
1.000
0.12
0.008
0.933
GraphSAGE
No
0.89
0.14
0.999
0.94
20.13
1.000
0.58
13.54
1.000
0.11
0.008
0.955
Yes
0.51
0.09
1.000
0.86
20.48
1.000
0.61
13.83
1.000
0.07
0.005
0.998
GCN
No
1.20
0.15
0.999
0.67
13.44
1.000
0.82
19.48
0.999
0.06
0.004
0.996
TABLE IV: Ablation study: prediction head accuracy.
Fig. 3: Average MAPE (%) across DSP, FF, LUT, and CP for the three method variants under four GNN backbones.
High-Level Synthesis (HLS) compiles algorithmic C/C++ descriptions into hardware, with Quality of Results (QoR) -- latency and resource utilization -- critically governed by pragma configurations and code structure. Existing LLM-based HLS approaches train for functional correctness but ignore QoR entirely. We observe that reinforcement learning (RL) for HLS does not require absolute synthesis results -- only relative comparisons between candidates. Based on this insight, we propose HLS-Seek, a QoR-aware NL-to-HLS framework that replaces expensive synthesis-in-the-loop RL with a comparative proxy reward model achieving 99.53% Pareto-dominance accuracy. To prevent reward hacking, we introduce uncertainty-aware Monte Carlo (MC) dropout switching that selectively invokes real Vitis HLS synthesis for low-confidence candidates and online updates the proxy, creating a self-improving reward system. HLS-Seek achieves 81.5% syntax correctness pass@1 and 81.4% Func@5 on HLS-eval with only 7B parameters, surpassing GPT-5.1 and other frontier models while achieving 8.5× faster training than real-reward RL. On QoR evaluation, HLS-Seek achieves the lowest latency on 16/30 kernels and Pareto-dominates HLS-specific baselines on 9 kernels.
Deep learning and large language models (LLMs) are rapidly gaining adoption in semiconductor design, driving demand for training datasets. Most efforts focus on hardware description languages (HDLs) while designs for high-level synthesis (HLS), a popular approach to domain-specific accelerators, remain scarce. HLS dataset efforts emphasize manual curation or design parameterization, seldom addressing high-quality LLM-based generation or diversity in code length, hierarchy, design-space size, latency, resource utilization, and application domain, potentially limiting model generalization. We propose SyntheticHLS, a framework for generating large-scale, complex, diverse synthetic HLS datasets using LLMs. Its two key ideas are: 1) an iterative feedback-guided mutation loop that uses paired HLS source code and design-space specifications to incrementally transform seed designs into more complex, scalable designs; and 2) quantitative metrics of HLS design complexity and design-space scalability that serve as measurable objectives for LLM-guided mutation. We systematically cross-validate an HLS Quality-of-Results (QoR) deep learning model trained and tested across common HLS benchmarks, zero-shot synthetic designs, and iteratively mutated synthetic designs. Synthetic designs transfer well to common benchmark test sets while the reverse does not hold. SyntheticHLS's iteratively mutated designs provide the most generalizable training corpus among the datasets studied. Analysis of the mutation process and dataset shows that metric-guided trajectories consistently improve targeted complexity and scalability objectives without regressing non-target metrics. Mutated designs span a substantially broader, more diverse design space than zero-shot generated designs. Our framework, dataset, and evaluation are open-source: https://github.com/sharc-lab/synthetic-hls.
Stefan Abi-Karam, Miaoyan Zhou, Callie Hao
Georgia Institute of Technology · Georgia Tech Research Institute
Application-specific FPGA accelerators offer substantial performance and energy-efficiency gains across many application domains, but developing them is costly, often requiring months of specialized effort. Even with high-level synthesis (HLS), designers still need extensive hardware expertise to build high-performance accelerators. Although large language models (LLMs) have demonstrated strong software-generation capabilities, even frontier models lack the hardware intuition and procedural knowledge needed to reliably translate baseline C/C++ programs into high-performance HLS designs: they struggle to identify effective architectures, follow the optimization processes used by HLS experts, and apply hardware transformations consistently across diverse kernels. We present HLSmith, an expert-guided framework for translating C/C++ programs into optimized HLS accelerators. HLSmith combines three components: an HLS optimization expertise library that encodes guarded transformation recipes, their applicability and prerequisite conditions, and unsafe cases to avoid; a staged, feedback-driven orchestration flow modeled on expert HLS development practice that guides agents through synthesis, bottleneck analysis, and optimization; and a tool-grounded model-adaptation pipeline that converts optimization trajectories from commercial frontier models into training data for fine-tuning open-weight LLMs. We evaluate HLSmith on PolyBench against ChatHLS, a leading prior agent-orchestration framework for HLS accelerator development. HLSmith achieves a geometric mean speedup of 4.24x over ChatHLS while producing functionally correct designs, in both software and RTL simulation, for every benchmark, compared with ChatHLS's 57% valid-design rate. It further reaches speedups of up to 252x and 138x with commercial frontier models and open-weight models, respectively.
Yuebo Luo, Ahmad Sedigh Baroughi, Philip Stachura +4
University of Minnesota Twin Cities · Simon Fraser University · Argonne National Laboratory