From Processing to Functionality: Engineering Accessible Material States in Cu-Embedded SiOx Memristive Devices
Authors: Tobias Gergs, Rouven Lamprecht, Sahitya Yarragolla, Ole Gronenberg, Luca Vialetto, Hermann Kohlstedt, Thomas Mussenbrock, Jan Trieschmann
Organizations: Theoretical Electrical Engineering, Department of Electrical and Information Engineering, Kiel University, Kaiserstraße 2, 24143 Kiel, Germany · Chair of Applied Electrodynamics and Plasma Technology, Faculty of Electrical Engineering and Information Technology, Ruhr University Bochum, 44780 Bochum, Germany · Fraunhofer Institute for Electronic Nano Systems ENAS, 09126 Chemnitz, Germany · Nanoelectronics, Department of Electrical and Information Engineering, Kiel University, Kaiserstraße 2, 24143 Kiel, Germany · Kiel Nano, Surface and Interface Science KiNSIS, Kiel University, Christian-Albrechts-Platz 4, 24118 Kiel, Germany · Synthesis and Real Structure, Department of Materials Science, Kiel University, Kaiserstraße 2, 24143 Kiel, Germany · Department of Mechanical and Aerospace Engineering, University of California, Los Angeles, Los Angeles, CA 90095, United States of America
Resistive switching in oxide-based devices is widely governed by stochastic defect processes, yet a predictive link between fabrication conditions and functional behavior remains elusive. Here, we establish a multiscale framework connecting plasma-defined deposition conditions to macroscopic device functionality in sputtered SiOx/Cu/SiOx-based systems. By combining large-scale statistical analysis of more than 50,000 experimentally characterized devices with physics-based plasma and atomistic simulations, we show that device behavior does not emerge from deterministic process-to-performance mappings, but from a probabilistic cascade spanning defect formation, defect-state evolution, and functional-regime emergence. Data-driven clustering reveals a continuous functional state space composed of operational switching types, while inverse modeling identifies the reconstructed oxygen-vacancy density as an effective latent descriptor capturing the combined influence of structural disorder and defect topology. This latent descriptor is strongly coupled to both Cu redistribution and electrical response, linking otherwise hidden material properties to observable device characteristics. Furthermore, macroscopic switching behavior is argued to arise from ensemble integration across spatially heterogeneous subdomains, providing a physical explanation for the pronounced variability of large-area devices. These findings shift the perspective from deterministic defect engineering toward probabilistic defect-state design and establish a physically grounded framework for understanding and controlling functional variability in such oxide-based systems, such as memristive or resistive-switching devices.
Figures & tables
Figure 1: Schematic illustration of the deposition process. The target and substrate processes are depicted at mesoscopic and nanoscale resolution, highlighting their governing role. In addition to elastic momentum transfer collisions, dominant transport processes are highlighted, i.e., Ar electron impact ionization, O 2 electron impact ionization, and O 2 dissociative attachment.
Figure 2: Schematic illustration of wafer-scale device variability. Nominally identical devices distributed across the wafer can exhibit diverse electrical responses, represented by exemplary I – V characteristics. The TiN/SiO x /Cu/SiO x /TiN device architecture is shown at mesoscopic and nanoscale resolution, where red and yellow spheres indicates VO and Cu, respectively.
Figure 3: Schematic illustration of the information flow underlying the forward and reverse engineering of defect-state formation in Cu-embedded SiO x memristive devices.
Figure 4: a) U-matrix predicted by SOM, superimposed with the I – V curves centroids of the respective 34×34 clusters; b) Cluster aggregation based on I – V features; c) Per cluster: 200 randomly selected, experimental, and min-max normalized I – V curves (gray), superimposed with the results of the CIC device simulations (black) and with the centroids of all respective I – V curves (colored). An enlarged version of a) is included in the Supplementary Information for better readability. The color in b) and c) codes the key nanoelectrical characteristics.
Figure 5: Generalized manufacture yields Ydevice as a function of the radial device site on the wafer rwafer during the SiO x deposition. Power PSiOx and deposition time tSiOx are included in each top right corner.
Figure 6: a) In SiO x dissolved effective Cu density nCu as a function of the effective oxygen vacancy density nVO required by CIC device-level simulations. b) The expected value of the oxygen vacancy densities as a function of the radial device site on the wafer rwafer and deposition time tSiOx . The power PSiOx is included in each top left corner.
Figure 7: Results of Ar/O 2 plasma simulations at 5 % O 2 , 0.5 Pa, 300 K, Vrf=250 V, and VSB=−110 V. a) Chemical composition x in SiO x , b) Ar + ion flux ΓAr+ , and c) average energy per Ar + ion EˉAr+ at the substrate as a function of radial position.
Figure 8: Results of Ar ion-SiO x interaction simulations for x∈[0,1] in SiO x and Ar + flux to Si flux ratio ΓAr+/ΓSi∈[0,1] with mean ion energies of 35 eV. a) Intrinsic defect densities for DBs, NBOs, and V O . b) Ratio of Si-Si bond density to Si-O bond density nSi-Si/nSi-O . c) Mass density ρ .
HP
search range
selection
nneurons
[9,5776]
1156
η
[0.01,10]
0.01
σ
[1,100]
10
t
[ 103 , 105 ]
105
topology
{Rect,Hex}
Rect
distance
{Cos,Euclid}
Euclid
Table 1: Search ranges and selected values of the SOM HPs. The number of neurons, initial learning rate, initial spread of the Gaussian neighborhood function, and number of iterations are denoted by nneurons , η , σ , and t , respectively. Topology and distance metrics are abbreviated as rectangular (Rect), hexagonal (Hex), cosine (Cos), and Euclidean (Euclid).
HP
search range
selection
kernel function
{Gaus,Exp,Lin}
Exp
BW of Adevice
[ 10−5 , 103 ]
0.26
BW of FAr/FO2
[ 10−5 , 103 ]
5.11
BW of PSiOx
[ 10−3 , 101 ]
0.16
BW of tSiOx
[ 10−5 , 103 ]
0.10
BW of rwafer
[ 10−5 , 103 ]
0.05
Table 2: Search range defined either by the respective interval or complete set, and finally selected HP for the KDE. The kernel functions are abbreviated as follows Gaussian (Gaus), Exponential (Exp), and Linear (Lin). Please note that the HP values have been normalized to a range of 0–1 using min/max normalization. Hence, all BWs are in arbitrary unit (a.u.).
Figure 9: Maximum change in device yield (ΔYdevice)max as a function of individual process parameters (marginalized accordingly). The markers’ centers and ranges indicate the mean and root mean square deviations across the seven clusters, respectively.
Figure 10: Schematic of the cylindrically symmetric simulation domain and the magnetic field structure of the Ar/O 2 sputter deposition. Magnets are indicated above the target.
Building on resistive communication, this paper presents a physics-based design of an on-chip neural network with multi-level memristive synapses supporting a dense spectrum of conductance states. Derived from ionic transport physics, we develop a state-variable model and quantify storable sub-levels under thermal noise, drift, and quantized conductance. We assemble these devices into a 1T1R crossbar fabric, derive the linear algebra of analog vector-matrix multiplication (VMM) under wire resistance, and design a differential synapse for signed weights. A multilayer pipeline executes inference, backpropagation, and weight updates physically in the analog domain. We derive the in-situ outer-product learning rule, its discretization onto the conductance lattice, and the resulting quantization noise. We provide energy, area, capacity, and inter-tile models, showing this substrate is ideally suited for large language models (LLMs). Our design eliminates weight movement, surpassing binary ReRAM and traditional CMOS. We detail the material stack (HfO_2-based), the FEOL/BEOL CMOS foundry-integration flow, a self-contained SPICE model, the complete memristive-FPGA neuromorphic system, and an in-memory self-attention engine with current-mode translinear softmax. Finally, a ternary BitNet datapath shows projected per-token efficiency orders of magnitude better than advanced CPUs or GPUs. The result is a self-contained hardware-native blueprint for a high-density, analog, in-memory neural processor.
Memristive crossbars store numerical weights needing aggregation and decoding; a single junction means nothing alone. This paper presents a fundamentally different use: each junction stores a complete, domain-scoped logical assertion (holds/negated/undefined). Ternary resistance states encode these values directly. We establish a structure-preserving mapping from a domain algebra to crossbar topology: domains become isolated arrays, specialization becomes directed wiring, relation typing controls inheritance gates, and cross-domain links become explicit registers. The physical layout thus embodies the algebra; changing wiring changes reasoning semantics. We detail an ICD-11 respiratory disease classification chip (1,247 entities, ~136k 1T1R junctions) enabling domain scoping, three-valued logic, transitive cascade, typed inheritance, and cross-axis queries. Behavioral simulation (sigma_log=0.15, SNR=20dB) shows error-free operation across 100,000 trials per task with wide tolerance margins. Where prior work unified representation and computation in software, this work unifies them in hardware: reading one junction answers one question, without symbolic interpretation.
Reservoir computing (RC) is an emerging recurrent neural network architecture that has attracted growing attention for its low training cost and modest hardware requirements. Memristor-based circuits are particularly promising for RC, as their intrinsic dynamics can reduce network size and parameter overhead in tasks such as time-series prediction and image recognition. Although RC has been demonstrated with several memristive devices, a comprehensive evaluation of device-level requirements remains limited. In this paper, we analyze and explain the operation of a parallel delayed feedback network (PDFN) RC architecture with volatile memristors, focusing on how device characteristics -- such as decay rate, quantization, and variability -- affect reservoir performance. We further discuss strategies to improve data representation in the reservoir using preprocessing methods and suggest potential improvements. The proposed approach achieves 95.89% classification accuracy on MNIST, comparable with the best reported memristor-based RC implementations. Furthermore, the method maintains high robustness under 20% device variability, achieving an accuracy of up to 94.2%. These results demonstrate that volatile memristors can support reliable spatio-temporal information processing and reinforce their potential as key building blocks for compact, high-speed, and energy-efficient neuromorphic computing systems.
Rishona Daniels, Duna Wattad, Ronny Ronen +2
Viterbi Faculty of Electrical and Computing Engineering, Technion - Israel Institute of Technology, Haifa, Israel · College of Engineering and Physical Sciences, Aston University, Birmingham B4 7ET, United Kingdom