Realizability Is Not Enough: Encoding, Liveness, and Auditing of Synthesized Robot Supervisors
Organizations: Capable Humanitarian Robotics and Intelligent Systems Lab (CHRISLab) School of Engineering and Computing, Christopher Newport University Newport News, Virginia, 23606, USA.
Abstract
High-level robotic supervisors coordinate capabilities whose reported outcomes determine the robot's next action. Reactive synthesis can generate such supervisors with formal guarantees, but deployment requires more than proving a Generalized Reactivity (1) (GR(1)) specification realizable. Designers must encode failure-prone capabilities, choose liveness assumptions that match retry intent, audit strategies, and translate them into robot software. We present an open-source pipeline for Robot Operating System (ROS) 2 Flexible Behavior Engine (FlexBE) supervisors that generates capability-based GR(1) specifications, analyzes assumptions before synthesis, audits strategies, reduces states with a behavior-preservation proof, and emits executable state machines. Across four case studies (six comparisons), including hardware on two quadcopter platforms, we compare enumerated and one-hot encodings and two liveness formulations. Under the tested backend, enumerated encoding usually synthesizes faster, although fewer propositions do not reliably predict smaller controllers or lower symbolic cost. System-Goal without pending memory is the only liveness treatment confirmed to yield executable controllers under both encodings across the reported grid; Fair-Outcome can permit realizable cycles without designer-intended completion. For this backend and model, we recommend enumerated encoding with System-Goal and auditing every realized strategy, since proposition count and realizability do not measure deployability. The auditor is sound and complete for four structural defect classes (protocol violations, deadlocks, bounded-failure violations, goal-unreachable traps) but is not a general liveness verifier, and the reduction preserves capability-level behavior. Together, these stages narrow the gap between formal realizability and controllers that pass protocol and structural-progress checks.
Figures & tables
| Term | Form |
|---|---|
| Environment | |
| with only | |
| System | |
| with only | |
| gr_a | outcome observed | gr_p | rule | |
|---|---|---|---|---|
| 0 | F | — | F | (initial) |
| 1 | T (activate) | — | T | conjunct 1 |
| 2 | F | gr_f (failure) | T | conjunct 2 |
| 3 | T (retry) | — | T | conjunct 1 |
| 4 | F | gr_c (completed) | F | conjunct 3 |
| 5 | F | — | F | conjunct 4 |
| Question | Well-separation / assumption-falsification analysis | Post-synthesis strategy auditor |
|---|---|---|
| Artifact checked | The GR(1) specification and game before synthesis. | The extracted Mealy strategy after synthesis. |
| Main failure exposed | Whether the specification lets the system win by falsifying or depending on environment assumptions, including broader game-level fairness hazards. | Whether the concrete strategy violates the activation–outcome protocol or enters a reachable cyclic region from which the configured goal is structurally unreachable. |
| What it catches in our examples | The specification-level source of the Fair-Outcome retry hazard; that is, progress can depend on assumptions about future outcomes that the controller does not force. | The realized symptom in the generated controller; that is, pending-without-activation cycles in which no completion outcome can occur and the task goal is cut off. |
| What it does not certify | That a particular extracted or reduced strategy obeys the FlexBE capability protocol, respects bounded-failure counters, or remains free of concrete strategy-level traps. | That every possible livelock has been excluded. SCCs with an available but unforced exit to a goal remain a game- or fairness-aware analysis problem. |
| Benefit | Diagnoses the modeling weakness before committing to a controller. | Validates the actual artifact that the pipeline will execute. |
| Domain | Goal condition | Interpretation |
|---|---|---|
| Coffee | br_c | Recurring successful brew completion in a controller designed to run forever. |
| Two-Rivers | finished | Successful terminal output after all entities reach the far bank. |
| PyRoboSim P0/P1 | finished | Successful terminal output after the delivery task is complete. |
| Quadcopter | finished failed | Programmed terminal output; the audit certifies reachability of termination, not mission success alone. |
| Factor | Levels tested |
|---|---|
| Capability encoding | One-hot (Section 5.2.2 ) and enumerated (Section 5.2.2 ) |
| Liveness formulation | System-Goal (Section 5.2.3 ) and Fair-Outcome (Section 5.2.3 ) |
| Pending memory | Without or with a persistent proposition tracking whether a completion is still owed (Section 5.2.1 ) |
| Comparisons | Coffee base and extended capability sets (Section 6.1 ), Two-Rivers (Section 6.2 ), PyRoboSim P0 without door modeling (Section 6.3.1 ), PyRoboSim P1 with door modeling (Section 6.3.2 ), and Crazyflie/PiHawk hardware (Section 6.4 ) |
| Declaration ordering | Fixed alphabetic, fixed capability-grouped (“domain-grouped”), and random-seed orderings ( for Coffee/Two-Rivers and for PyRoboSim P0/Crazyflie). Each random seed shuffles the input declarations and the output declarations, except that the enumerated encoding’s shared capability declaration is always written first in the output block. PyRoboSim P1’s main table reports single fixed-ordering trials; Appendix 12.3 adds a 20-random-seed sweep for 4S / 4F . |
| CUDD reordering policy | Threshold 250 for the principal experiment grid unless otherwise noted. PyRoboSim P1’s original single-ordering tables (Table 12 , Table 23 ) use the P1 configuration’s uncapped (“auto”) policy; Appendix 12.3 separately reports threshold-250 P1 ordering experiments for 4S / 4F . |
| Row | What It Measures | Timing Source |
|---|---|---|
| Generate Specs | Building the GR(1) specification from the request’s capability subset (Section 3.2 ). | Python harness |
| Well-Separation | Assumption-falsification check on the compiled specification (Section 5.3 ), a separate slugs invocation. | slugs -internal |
| Realizability | The Synthesis time reported by slugs , the GR(1) fixed-point computation that decides realizability and, when realizable, yields the symbolic winning strategy as a byproduct rather than a separate pass. | slugs -internal |
| Extraction | The subsequent walk converting the symbolic strategy into the explicit Mealy machine slugs returns. Realizable rows only. | slugs -internal |
| Auditing | The post-synthesis auditor’s pass over the extracted machine (Section 5.5 ). | Python harness |
| Realize HFSM | Translating the reduced strategy into an executable FlexBE HFSM and generating its initial GUI layout (Section 3.2 ). | Python harness |
| 1 | 2S | 3S | 2F | 3F | 2SP | 3SP | 2FP | 3FP | |
| Well Separated | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | No |
| Realizable | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| FlexBE HFSM Realized | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| 4 | 3 | 6 | 3 | 6 | 3 | 6 | 3 | 6 | |
| 3 | 3 | 5 | 3 | 5 | 3 | 8 | 3 | 8 | |
| |Slugs SM| | 7 | 4.5 | 7 | 4.5 | 7 | 4.5 | 7 | 4.5 | 7 |
| 2S | 3S | 2F | 3F | 2SP | 3SP | 2FP | 3FP | |
| Well Separated | Yes | Yes | Yes | Yes | Yes | Yes | Yes | No |
| Realizable | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| FlexBE HFSM Realized | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | |
| 2 | 4 | 2 | 4 | 2 | 7 | 2 | 7 | |
| |Slugs SM| | 6 | 8 | 6 | 8 | 6 | 8 | 6 | 8 |
| 2S | 3S | 2F | 3F | 2SP | 3SP | 2FP | 3FP | |
| Well Separated | Yes | Yes | No | No | Yes | Yes | No | No |
| Realizable | Yes | Yes | No | No | Yes | Yes | Yes | Yes |
| FlexBE HFSM Realized | Yes | Yes | No | No | Yes | Yes | Yes | Yes |
| 13 | 10 | 13 | 10 | 13 | 10 | 13 | 10 | |
| 10 | 8 | 10 | 8 | 11 | 9 | 11 | 9 | |
| |Slugs SM| | 37 | 26 | – | – | 37 | 26 | 37 | 26 |
| Full | 2S | 2F | 2SP | 2FP | |
| Well Separated | No | No | No | No | No |
| Realizable | Yes | Yes | No | Yes | Yes |
| FlexBE HFSM Realized | Yes | Yes | No | Yes | No |
| 33 | 34 | 34 | 34 | 34 | |
| 16 | 17 | 17 | 20 | 20 | |
| |Slugs SM| | 116 | 47 | – | 47 | 108 |
| 3S | 3F | 3SP | 3FP | |
| Well Separated | No | No | No | No |
| Realizable | Yes | No | Yes | Yes |
| FlexBE HFSM Realized | Yes | No | Yes | No |
| 25 | 25 | 25 | 25 | |
| 12 | 12 | 15 | 15 | |
| |Slugs SM| | 38 | – | 38 | 84 |
| FullP1 | 2S | 4S | 4F | 4SP | 4FP | |
| Well Separated | TIME OUT | No | No | No | No | No |
| Realizable | Yes | Yes | Yes | No | Yes | Yes |
| FlexBE HFSM Realized | Yes | Yes | Yes | No | Yes | No |
| 48 | 52 | 40 | 40 | 40 | 40 | |
| 14 | 19 | 13 | 13 | 17 | 17 | |
| |Slugs SM| | 559 | 59 | 46 | – | 46 | 118 |
| 1S | 2S | 1F | 2F | 1SP | 2SP | |
| Well Separated | Yes | Yes | Yes | Yes | Yes | Yes |
| Realizable | Yes | Yes | Yes | Yes | Yes | Yes |
| FlexBE HFSM Realized | Yes | Yes | Yes | Yes | Yes | Yes |
| 84 | 2 | 84 | 2 | 84 | 2 | |
| 91 | 46 | 91 | 46 | 124 | 79 | |
| |Slugs SM| | 119.3 | 131 | 102 | 131 | 187.0 | 347 |
| Domain | Encoding | Peak BDD Nodes | Realizability | HFSM Realized | |Reduced| |
|---|---|---|---|---|---|
| Coffee (base) | One-Hot | 1,022 | 0.081 ms | Yes | 3.5 |
| Coffee (base) | Enumerated | 1,022 | 0.050 ms | Yes | 4 |
| Coffee (extended) | One-Hot | 1,022 | 2.149 ms | Yes | 3 |
| Coffee (extended) | Enumerated | 1,022 | 0.059 ms | Yes | 4 |
| Two-Rivers | One-Hot | 13,133 | 53.787 ms | Yes | 23 |
| Two-Rivers | Enumerated | 19,597 | 90.677 ms | Yes | 23 |
Appendix figures & tables12 assets
Supplementary material from the paper’s appendix.
Appendix
| 1 | 2S | 3S | 2F | 3F | 2SP | 3SP | 2FP | 3FP | |
| Well Separated | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | No |
| Realizable | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| FlexBE HFSM Realized | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| 4 | 3 | 6 | 3 | 6 | 3 | 6 | 3 | 6 | |
| 3 | 3 | 5 | 3 | 5 | 3 | 8 | 3 | 8 | |
| 3 | 3 | 6 | 3 | 6 | 3 | 6 | 3 | 6 |
| 2S | 3S | 2F | 3F | 2SP | 3SP | 2FP | 3FP | |
| Well Separated | Yes | Yes | Yes | Yes | Yes | Yes | Yes | No |
| Realizable | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| FlexBE HFSM Realized | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | |
| 2 | 4 | 2 | 4 | 2 | 7 | 2 | 7 | |
| 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 |
| Cap. | Enc. | Live. | Pend. | Alpha none | Alpha thr250 | Dom. none | Dom. thr250 | Rand. none | Rand. thr250 |
|---|---|---|---|---|---|---|---|---|---|
| Base | full | — | — | 1022 | 1022 | 1022 | 1022 | 1022 | 1022 |
| Base | enum. | F | N | 1022 | 1022 | 1022 | 1022 | 1022 | 1022 |
| Base | enum. | F | Y | 1022 | 1022 | 1022 | 1022 | 1022 | 1022 |
| Base | enum. | S | N | 1022 | 1022 | 1022 | 1022 | 1022 | 1022 |
| Base | enum. | S | Y | 1022 | 1022 | 1022 | 1022 | 1022 | 1022 |
| Base | 1-hot | F | N | 1022 | 1022 | 1022 | 1022 | 1022 | 1022 |
| 2S | 3S | 2F | 3F | 2SP | 3SP | 2FP | 3FP | |
| Well Separated | Yes | Yes | No | No | Yes | Yes | No | No |
| Realizable | Yes | Yes | No | No | Yes | Yes | Yes | Yes |
| FlexBE HFSM Realized | Yes | Yes | No | No | Yes | Yes | Yes | Yes |
| 13 | 10 | 13 | 10 | 13 | 10 | 13 | 10 | |
| 10 | 8 | 10 | 8 | 11 | 9 | 11 | 9 | |
| 9 | 6 | 9 | 6 | 9 | 6 | 9 | 6 |
| Ordering | Encoding | Realizability (ms) | Peak BDD Nodes |
|---|---|---|---|
| Alphabetic | One-Hot | 68.1 | 13,286 |
| Alphabetic | Enumerated | 51.8 | 10,220 |
| Domain-grouped | One-Hot | 70.3 | 13,286 |
| Domain-grouped | Enumerated | 57.5 | 10,220 |
| Random (mean, ) | One-Hot | 53.8 | 13,132.7 |
| Random (mean, ) | Enumerated | 90.7 | 19,596.9 |
| Encoding | Mean (ms) | Median (ms) | Std. Dev. (ms) | Min (ms) | Max (ms) |
|---|---|---|---|---|---|
| One-Hot | 53.8 | 53.9 | 9.6 | 29.3 | 86.3 |
| Enumerated | 90.7 | 77.8 | 44.8 | 41.4 | 229.5 |
| Trials Discarded | Trials Remaining | Enumerated Mean (ms) |
|---|---|---|
| 0 | 200 | 90.7 |
| 5 (2.5%) | 195 | 87.1 |
| 10 (5%) | 190 | 84.6 |
| 20 (10%) | 180 | 79.9 |
| 40 (20%) | 160 | 72.6 |
| MoveOnly | Full | 2S | 3S | 2F | 3F | 2SP | 3SP | 2FP | 3FP | |
| Well Separated | Yes | No | No | No | No | No | No | No | No | No |
| Realizable | Yes | Yes | Yes | Yes | No | No | Yes | Yes | Yes | Yes |
| FlexBE HFSM Realized | Yes | Yes | Yes | Yes | No | No | Yes | Yes | No | No |
| 8 | 33 | 34 | 25 | 34 | 25 | 34 | 25 | 34 | 25 | |
| 8 | 16 | 17 | 12 | 17 | 12 | 20 | 15 | 20 | 15 | |
| 4 | 17 | 18 | 9 | 18 | 9 | 18 | 9 | 18 | 9 |
| FullP1 | 2S | 4S | 4F | 4SP | 4FP | |
| Well Separated | TIME OUT | No | No | No | No | No |
| Realizable | Yes | Yes | Yes | No | Yes | Yes |
| FlexBE HFSM Realized | Yes | Yes | Yes | No | Yes | No |
| 48 | 52 | 40 | 40 | 40 | 40 | |
| 14 | 19 | 13 | 13 | 17 | 17 | |
| 32 | 36 | 24 | 24 | 24 | 24 |
| Ordering | Column | Realizability (s) | Peak BDD Nodes |
|---|---|---|---|
| Alphabetic, auto | 4S | 235.2 | 5,643,484 |
| Alphabetic | 4S | 3679.6 | 25,725,784 |
| Domain-grouped | 4S | 3617.5 | 25,725,784 |
| Random (mean, ) | 4S | 9164.0 | 26,155,841.6 |
| Alphabetic, auto | 4F | 31.3 | 713,356 |
| Alphabetic | 4F | 24.0 | 751,170 |
| 1S | 2S | 1F | 2F | 1SP | 2SP | |
| Well Separated | Yes | Yes | Yes | Yes | Yes | Yes |
| Realizable | Yes | Yes | Yes | Yes | Yes | Yes |
| FlexBE HFSM Realized | Yes | Yes | Yes | Yes | Yes | Yes |
| 84 | 2 | 84 | 2 | 84 | 2 | |
| 91 | 46 | 91 | 46 | 124 | 79 | |
| 84 | 2 | 84 | 2 | 84 | 2 |
| Configuration | Reduced | Executable actions | Terminal/bootstrap contexts | Realized HFSM |
|---|---|---|---|---|
| 1F | 68 | 51 | 15 failed + 1 finished + 1 begin_game | 54 |
| 1S | 83 | 66 | 15 failed + 1 finished + 1 begin_game | 69 |
| 1SP | 141 | 105 | 31 failed + 4 finished + 1 begin_game | 108 |
| 2F | 106 | 51 | 53 failed + 1 finished + 1 null/bootstrap | 54 |
| 2S | 106 | 51 | 53 failed + 1 finished + 1 null/bootstrap | 54 |
| 2SP | 318 | 86 | 227 failed + 4 finished + 1 null/bootstrap | 89 |