physics.opticsApr 12, 2026

Harnessing Photonics for Machine Intelligence

Authors: Hanqing Zhu, Shupeng Ning, Hongjian Zhou, Ziang Yin, Ray T. Chen, Jiaqi Gu, David Z. Pan

Organizations: The University of Texas at Austin · Arizona State University

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Abstract

The exponential growth of machine-intelligence workloads is colliding with the power, memory, and interconnect limits of the post-Moore era, motivating compute substrates that scale beyond transistor density alone. Integrated photonics is emerging as a candidate for artificial intelligence (AI) acceleration by exploiting optical bandwidth and parallelism to reshape data movement and computation. This review reframes photonic computing from a circuits-and-systems perspective, moving beyond building-block progress toward cross-layer system analysis and full-stack design automation. We synthesize recent advances through a bottleneck-driven taxonomy that delineates the operating regimes and scaling trends where photonics can deliver end-to-end sustained benefits. A central theme is cross-layer co-design and workload-adaptive programmability to sustain high efficiency and versatility across evolving application domains at scale. We further argue that Electronic-Photonic Design Automation (EPDA) will be pivotal, enabling closed-loop co-optimization across simulation, inverse design, system modeling, and physical implementation. By charting a roadmap from laboratory prototypes to scalable, reproducible electronic-photonic ecosystems, this review aims to guide the CAS community toward an automated, system-centric era of photonic machine intelligence.

Figures & tables

Fig. 1 : Physical advantages of photonic computing: ultra-low latency via RC-free propagation, high bandwidth density via multiplexing, and superior energy efficiency.
Fig. 2 : System-level energy efficiency vs. compute density comparison between silicon-photonic accelerators and digital GPUs. The axes report effective energy efficiency (TOPS/W) and compute density (TOPS/mm 2 ) under reported or derived system-level assumptions. GPU points correspond to NVIDIA V100 [ 45 ] , A100 [ 46 ] , H100 SXM [ 47 ] , and B200 [ 48 ] , using vendor-reported peak INT8 performance and die area. Photonic points are compiled from prior silicon-photonic accelerator works [ 23 , 28 , 29 , 32 , 42 , 49 , 50 , 51 , 52 , 53 , 54 , 55 , 56 , 57 , 58 , 59 , 60 , 61 , 62 , 63 , 64 , 65 , 66 , 67 , 68 , 69 ] and are annotated to reflect which scaling dimensions each design emphasizes (area efficiency, energy efficiency, robustness at scale, and dynamic-workload capability, such as attention).
Fig. 3 : SimPhony [ 33 ] cross-layer modeling framework for heterogeneous electronic-photonic AI systems. A modular PTC can be instantiated from different architecture families under a unified system interface. The framework maps NN operators into GEMM workloads, generates optics-specific dataflow, and evaluates end-to-end metrics using analyzers for memory traffic, area/floorplan, power/energy breakdown, and optical link budget.
Fig. 4 : (a) Energy efficiency and compute density comparison between photonic and digital electronic hardware. (b) End-to-end energy breakdown comparison across 3 representative PTC families under dynamic attention and static linear workloads with matched computations. All results are simulated using SimPhony [ 33 ] . Arch Setting : Total of 8 8 ×\times 8 PTCs with 12 wavelengths, 8-bit precision, and a 5 GHz clock rate. Workload : Attention uses sequence length S=1024S=1024 and embedding dimension D=512D=512 ; Linear layer projects hidden dimension from 512 to 1024 with a batch of 4. MZI mesh is incompatible with attention, thus omitted.
Fig. 5 : Impact of parameter scaling on energy breakdown and power efficiency across representative designs on a single tensor core . We evaluate three canonical photonic tensor core designs, the dynamic time-multiplexing crossbar [ 32 ] , the Clements MZI mesh [ 28 ] , and the weight bank [ 49 ] , using simplified and standardized models. Energy breakdowns (left panels) and energy efficiency in TOPS/W (right panels) are reported as functions of (a) core size, (b) number of wavelengths, (c) bit precision, and (d) operating frequency. The baseline configuration is one 8 ×\times 8 core, 12 wavelengths, 8-bit precision, and 5 GHz operation. All results are obtained using SimPhony [ 33 ] to ensure a fair and consistent comparison across architectures. All scaling explorations are performed using a 4-batch linear projection ( 512 ⁣→ ⁣1024512\!\rightarrow\!1024 ) to ensure all PTC families can be evaluated.
DomainApproachModelInputs | ConditionPhysics PriorDevices/ScalesSpeedupErrorComment
Frequency -domainOne-shotMaxwellNet [ 96 ]ϵr ∣ λ,Ω,J,\epsilon_{r}~|~\lambda,\Omega,J, PMLMaxwell LossLens/ <10λ<10\lambda300-600 ×\times over COMSOL∼\sim 0.01 N-L2 Error 
WaveY-Net [ 97 ] (U-Net)ϵr ∣ λ,Ω,J,\epsilon_{r}~|~\lambda,\Omega,J, PMLMaxwell LossGrating/ <10λ<10\lambda700 ×\times over Direct Solver3e-2 MAEFast Limited scalability
NeurOLight [ 98 ] (FNO)ϵr,λ,Ω,J ∣\epsilon_{r},\lambda,\Omega,J~| PMLWave PriorTunable/etched MMI/ ∼10λ\sim 10\lambda>100 ×\times over Direct Solver0.12 N-MAE
PACE [ 99 ] (FNO)ϵr,λ,Ω,J ∣\epsilon_{r},\lambda,\Omega,J~| PMLWave PriorTunable/etched MMI, Metaline/ ∼10λ\sim 10\lambda150-500 ×\times over Direct Solver0.03-0.1 N-MAE
IterativeFNO+F-GMRES [ 100 ]ϵr,λ,Ω,J,∣Ae−b∣,\epsilon_{r},\lambda,\Omega,J,|Ae-b|, PMLMaxwell ResidualWDM, Coupler, Metalens/ ∼100λ\sim 100\lambda10 ×\times over iterative GMRES1e-3 L1 ErrorScalable Limited speedup
Time -domainAutoregressivePIC 2 OSim [ 101 ] (CNN)ϵr,λ,Ω,J\epsilon_{r},\lambda,\Omega,J | PMLCausality, ModelMRR, MMI, Metaline300-600 ×\times over MEEP3e-2 N-L2NormBroadband Error accumulates
TABLE I : Categorized AI-assisted photonic device full-field simulation approaches with key feature comparison. N- means normalized. MAE is the mean absolute error.
Fig. 6 : Photonic component inverse design flows. (1) Optimization-based, (2) Generative, and (3) Hybrid methods.
DeviceGeometryInvDes methodDoFDesign regionFab-aware# Sims
Optical amplifier † [ 111 ]StructuralPSO + NN7N/A✗∼\sim 10,000
Wavelength router [ 112 ]StructuralPSO + NN5N/APost-hoc∼\sim 1,000
Phase shifter [ 113 ]StructuralPSO3Lenght ∼3 μm\sim 3~\mu\mathrm{m}✗∼\sim 1,000
Few-mode fiber [ 114 ]StructuralInversed NN5N/APost-hoc∼\sim 10,000
Microring resonator [ 115 ]BoundaryBO∼\sim 10Radius ∼3 μm\sim 3~\mu\mathrm{m}Post-hoc∼\sim 100
Mode splitter [ 116 ]BoundaryAGO∼\sim 20014×2.5 μm214\times 2.5~\mu\mathrm{m}^{2}Post-hoc∼\sim 400
TABLE II : Representative inverse-designed photonic devices, comparing geometry parameterization schemes, optimization methods, degrees of freedom (DoF), design-region sizes, fabrication-awareness strategies, and the approximate number of simulations required (# Sims). Devices marked with † are active components. Abbreviations: PSO = particle swarm optimization; BO = Bayesian optimization; GA = genetic algorithm; DRL = deep reinforcement learning; DBS = direct-binary search; AGO = adjoint gradient optimization.
Fig. 7 : Inverse-designed photonic components and circuit modules can achieve similar functionalities with orders-of-magnitude smaller spatial footprint compared to manual counterparts. (a) Manual [ 131 ] and inverse-designed four-mode mode-division multiplexer [ 132 ] . (b) Manual [ 133 ] and inverse-designed photonic tensor core circuit [ 129 ] .
Fig. 8 : Challenges of photonic inverse design.
Fig. 9 : Representative PIC layout automation research milestones and trends.
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