Optical proximity correction (OPC) recipes grow as engineers add local rules to repair newly discovered lithography hotspots. Each correction can interact with existing rules, while lessons from commercial-tool trials remain scattered across code and logs. \system combines a Virtual Process Engineer (VPE) harness with a Skill Bank of measured engineering experience. The harness equips a frozen language model with process manuals, layout analysis, recipe editing, and commercial-tool evaluation. The actor proposes changes to the global parameters, local targeted rules, or diagnostic trials. After each evaluation, an LLM reflector and curator turn the measured response into evidence-linked judgments. The actor retrieves them before its next trial. Feasible improvements update the retained recipe; every measured trial informs the Skill Bank that guides the next edit. The model weights remain fixed. On a FreePDK45-derived benchmark with ten commercial-tool evaluations per case, \system reduces the mean per-case maximum edge placement error from 18.294 to 5.361 nm on Poly and from 22.052 to 15.692 nm on Metal1. Every final recipe satisfies the predefined quality constraints and improves the maximum error by at least 0.1 nm.
Figures & tables
Figure 1: From recipe development to VPEvolve. (a) OPC recipes combine global settings with local rules for specific patterns. (b) Engineers diagnose printing errors and revise recipes, accumulating experience across edits and trial records. (c) VPEvolve connects recipe optimization with a Skill Bank that turns measured outcomes into guidance for subsequent experiments.
Figure 2: Computational-lithography evaluation. A recipe guides SRAF insertion and OPC to produce a mask, whose printed contours are simulated across focus and exposure conditions. EPE compares printed contours with target edges; PVB measures their variation across process conditions. These measurements guide subsequent recipe edits.
Figure 3: Recipe and experience evolution in VPEvolve. The actor uses the current recipe, spatial feedback, and retrieved experience to propose global changes or local corrections for commercial-tool evaluation. Feasible improvements update the retained recipe. The reflector interprets the measured response, and the curator revises the Skill Bank to guide subsequent trials; model weights remain fixed throughout both updates. The Poly example shows a local correction reducing EPE at the fixed measurement point from 6.793 to 3.800 nm.
Poly
Metal1
Overall
Method
Max ↓
Avg. ↓
PVB ↓
Max ↓
Avg. ↓
PVB ↓
Max ↓
SR ↑
OPC / LLM
Initial recipe
18.294
0.854
7.281
22.052
0.805
5.015
20.173
—
—
Raw Actor
17.271
0.835
7.239
19.609
0.758
4.969
18.440
80%
220 / 455
ReAct
16.501
0.817
7.120
17.775
0.729
4.885
17.138
100%
220 / 524
Textual Memory
17.296
0.781
6.977
18.966
0.742
4.878
18.131
85%
220 / 1030
ReasoningBank
17.523
0.833
7.151
20.538
0.756
4.924
19.031
75%
220 / 988
Table 1: VPEvolve versus seven baselines on Poly and Metal1. Layer-wise EPE and PVB are case means; overall success and call counts cover the benchmark. EPE is in nm and PVB in 10−3μ m.
Figure 4: Recipe evolution over ten optimization trials. Maximum EPE and PVB change from R0 for retained recipes. Thin lines are cases; thick lines and bands show medians and interquartile ranges. Endpoint labels are medians; Table 1 reports means. The dashed line marks the +2% PVB limit. Trial zero is R0; endpoint repeats are excluded.
Poly
Metal1
Condition
Max ↓
Mean ↓
PVB ↓
SR ↑
Max ↓
Mean ↓
PVB ↓
SR ↑
Full VPEvolve
5.361
0.645
7.398
100%
15.692
0.690
5.021
100%
Frozen Experience
8.082
0.640
7.319
90%
16.121
0.717
5.027
100%
w/o Domain Response Reflection
6.213
0.653
7.374
90%
16.280
0.742
5.023
100%
w/o Scoped Experience Revision
5.475
0.632
7.411
100%
16.334
0.717
5.025
90%
w/o Experiment Guidance
5.870
0.624
7.394
100%
16.154
0.725
5.025
90%
Table 2: Mechanism ablation of experience evolution. Metrics average the best feasible retained recipe for each case in each layer. EPE is in nm and PVB in 10−3μ m. SR is the share of assigned runs completing with a feasible maximum-EPE reduction of at least 0.1 nm.
Figure 5: Value of evolved experience and local correction. (a–b) Mean additional maximum-EPE reduction using fixed VPEvolve (solid) or ACE (dashed) experience from a shared fifth-trial recipe and history. (c–d) Paired maximum-EPE advantage after four trials; positive values favor local actions. Points are cases, diamonds are means, and bars are 95% paired bootstrap intervals.
Figure 6: Long-horizon recipe evolution. Retained maximum EPE (a, c) and PVB change from R0 (b, d) for Poly (blue) and Metal1 (green). VPEvolve is solid; Frozen Experience is dashed. Red dashes mark the +2% PVB limit; crosses mark Frozen’s termination at trial 57 on Metal1. Evaluated candidates count toward the horizon even when not retained. Endpoint repeats are excluded.
Figure 7: VPEvolve across language models. Each model serves as actor, reflector, and curator through its API. Bars show benchmark means for Poly (top) and Metal1 (bottom). EPE is in nm and PVB in 10−3μ m; lower is better.
Appendix figures & tables5 assets
Supplementary material from the paper’s appendix.
Appendix
Experiment
Windows
Configurations
Trial budget
Main comparison
20
8 methods
10
Mechanism ablation
20
5 variants
10
Cross-model evaluation
20
6 models
10
Experience-value continuation
20
2 experience banks
5
Local-action continuation
10
2 action sets
4
Long-horizon evaluation
2
2 variants
100
Appendix
Table A1: Experimental configurations and per-run trial budgets. Each configuration uses all listed windows; continuations count additional trials. Budgets exclude initialization and one final re-evaluation per run (per completed run for long-horizon evaluation).
Model
Output tokens
Temperature
Claude Sonnet 5
4,096
Default
GPT-5.6-Luna
4,096
Default
Gemini 3.8 Flash
4,096
0.3
DeepSeek-V4.1-Flash
4,096
0.3
GLM-5.3-Flash
16,384
0.3
Gemma-4-31B
4,096
0.3
Appendix
Table A2: Generation settings for the cross-model comparison. Output limits include reasoning tokens. Default denotes the provider’s sampling setting.
Poly
Metal1
Condition
Max ↓
Mean ↓
PVB ↓
Max ↓
Mean ↓
PVB ↓
ACE experience
5.313
0.647
7.404
16.328
0.698
5.022
VPEvolve experience
5.085
0.646
7.398
15.938
0.693
5.021
Global only
5.238
0.635
7.375
18.583
0.630
4.980
Global + local
5.185
0.651
7.379
18.012
0.698
4.996
Appendix
Table A3: Endpoint quality in the paired continuation studies. EPE is in nm; PVB is in 10−3μ m. Experience conditions cover the benchmark; each local-action condition has five cases per layer.
Comparison
Layer
Pairs
Mean (nm)
95% interval (nm)
Experience curation
Poly
10
0.228
[-0.098, 0.735]
Experience curation
Metal1
10
0.390
[-0.207, 1.022]
Local actions
Poly
5
0.054
[-0.143, 0.329]
Local actions
Metal1
5
0.571
[-1.465, 2.883]
Appendix
Table A4: Paired maximum-EPE advantage of VPEvolve experience over ACE experience, or of global and local actions over global actions alone. Positive values favor the first condition. Intervals use 20,000 bootstrap resamples of paired cases.
Method
Commercial-tool calls
Model requests
Raw Actor
11
22.75
ReAct
11
26.20
Textual Memory
11
51.50
ReasoningBank
11
49.40
ACE
11
91.65
Static Harness
11
25.10
Appendix
Table A5: Mean calls per assigned window in the main comparison, obtained by dividing Table 1 ’s totals by 20. Commercial-tool calls include endpoint repeats and exclude R0 initialization.
Semiconductor manufacturing uses process engineering, metrology, and automation to make chips reliably, improve yield, and meet tight device requirements.
Resolving Design Rule Violations (DRVs) in layouts entails an iterative loop of geometric edits and verification. We present DRC-Aid, a closed-loop agentic framework that automates local DRC repair by formulating it as verification-in-the-loop search. To constrain the combinatorial geometric repair space, a deterministic Rule Engine converts physical verification tool-reported violations into a bounded menu of geometric edits. An off-the-shelf Large Language Model (LLM) evaluates local geometric context to select edits from this menu, with budgeted depth-first search and backtracking. Immediate feedback from verification tools such as Calibre nmDRC/nmLVS enforces geometric compliance and guards against electrical-topology degradation, while a global Memory Bank prevents cyclic re-exploration. Evaluated on FreePDK45 layouts containing DRVs, DRC-Aid achieves DRC-clean, LVS-equivalent repairs in ~92.5% of cases with a ~98% total violation reduction, while residual cases yield partially repaired LVS-equivalent candidates. Under an identical search and verification infrastructure, LLM-based selection outperforms random (54.4%) and deterministic-heuristic (83.3%) policies, with the gap widening on cases with six or more violations.
Language-model agents can repair analog layouts when sign-off tools check every edit, but which model should plan a repair, which should edit it, and at what cost remain open questions. In our tool-grounded repair agent, models only choose bounded layout operators; sign-off tools rerun each task's contract checks after every edit, so failing layouts are never accepted. On layout-versus-schematic (LVS), design-rule checking (DRC), and post-layout repairs of three designs (a production high-voltage digital-to-analog converter (DAC), a 5-V oscillator, and a SKY130 operational transconductance amplifier (OTA)) with six tier-matched models from two vendors, 182 blind runs show that cheap models execute plans but rarely succeed alone (the cheapest model: 1 of 11 runs alone, 16 of 17 under a flagship planner; p < 0.001), cheap planners fail more often, and no fixed assignment is cheapest on every task. We propose a learning controller that selects models for each role and the escalation order from the first tool evaluation and updates Bayesian estimates after every attempt. With rules and initial estimates frozen before testing, the controller fixed 7 of 8 episodes on four sealed held-out tasks, matching the OpenAI flagship alone, at 15-40% of the flagship's spend per fix on three tasks but 8% higher spend overall. The cheapest mid-tier model alone fixed 6 of 8 at the lowest overall spend per fix but missed the hardest task. All 32 extracted DAC repairs match the human-guided LVS repair's integral nonlinearity (INL) within 0.005 least significant bits (LSB) at every code.
Xilai Dai, Saeed Mohammadi
Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907, USA
As semiconductor technology nodes scale, computational lithography is essential for ensuring yield and performance. However, lithography is a continuous physical process involving mask optimization, optical imaging, resist exposure, and development, which existing models fail to capture. To overcome this limitation, we present LithoDreamer, the first physics-informed World Model (WM) framework for computational lithography, which formulates the ``Layout-Mask-Resist Image-After Development Image (ADI)'' pipeline as a decision-driven multi-step evolution system. LithoDreamer captures feature changes between adjacent states to model stage-specific physics-informed latent spaces, in which it controls process intervention exploration and drives subsequent state transitions. To achieve interpretable intervention optimization without continuous supervision, we propose a contrastive variational optimization paradigm that contrasts the latent differences between intervention paths with variational evolution constraints, guiding the model to generate evolutions consistent with real lithography physics. Experiments show LithoDreamer achieves state-of-the-art performance in forward evolution and inverse planning. Our lithography dataset is publicly available at GitHub (https://github.com/7jiangyq/lithodreamer.git).