FPGA-Based Neural Network Acceleration

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6 papers in the last four weeks, against 2 the four weeks before. 0.1% of all new papers.

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Feasibility of Time-Domain DNN-Based Speech Enhancement on Embedded FPGA for Hearing Aid
Jun 2, 2026Feyisayo Olalere, Umut Altin, Kiki van der Heijden +1Efficient Neural Network Inference Speech Processing
Radboud University, Donders Institute for Brain, Cognition, and Behaviour, The Netherlands · Mortimer B. Zuckerman Mind, Brain, Behavior Institute, Columbia University, USA.
Spiker-LL: An Energy-Efficient FPGA Accelerator Enabling Adaptive Local Learning in Spiking Neural Networks
May 18, 2026Alessio Caviglia, Filippo Marostica, Alessandro Savino +1On-Device Training Energy-Efficient ML
Control and Computer Engineering Department, Politecnico di Torino, Turin, Italy
Surrogate Neural Architecture Codesign Package (SNAC-Pack)
May 15, 2026Jason Weitz, Dmitri Demler, Benjamin Hawks +3Hardware-Aware NAS FPGA-Based Neural Network Acceleration
University of California San Diego · 2ETH Zurich · 3Fermi National Accelerator Laboratory +1
Heterogeneous SoC Integrating an Open-Source Recurrent SNN Accelerator for Neuromorphic Edge Computing on FPGA
May 12, 2026Michelangelo Barocci, Vittorio Fra, Enrico Macii +1Edge Computing Heterogeneous Computing
Department of Computer and Control Engineering, Politecnico di Torino, Turin, Italy · Interuniversity Department of Regional and Urban Studies and Planning, Politecnico di Torino, Turin, Italy
Energy-Efficient Implementation of Spiking Recurrent Cells on FPGA
May 11, 2026Pascal Harmeling, Florent De Geeter, Guillaume DrionEfficient Neural Network Inference Spiking Neural Networks
Reconfigurable Computing Challenge: Real-Time Graph Neural Networks for Online Event Selection in Big Science
May 11, 2026Marc Neu, Frank Baptist, Thomas Lobmaier +3High-Energy Physics FPGA-Based Neural Network Acceleration
Institute for Information Processing Technology, Karlsruhe Institute of Technology, Germany · Institute of Experimental Particle Physics, Karlsruhe Institute of Technology, Germany
End-to-End Keyword Spotting on FPGA Using Graph Neural Networks with a Neuromorphic Auditory Sensor
May 10, 2026Wiktor Matykiewicz, Piotr Wzorek, Kamil Jeziorek +4Keyword Spotting Speech Processing
AGH University of Krakow, Poland · Embedded Vision Systems Group, Computer Vision Laboratory · Robotics and Technology of Computers Lab., ETSII, EPS, SCORE, I3US, Universidad de Sevilla
CARMEN: CORDIC-Accelerated Resource-Efficient Multi-Precision Inference Engine for Deep Learning
May 7, 2026Sonu Kumar, Mukul Lokhande, Santosh Kumar Vishvakarma +1Efficient Neural Network Inference Energy-Efficient ML
Dept. of Electrical Engineering Indian Institute of Technology Indore Simrol 453552, Indore, India · EnICS Labs Bar-Ilan University Ramat Gan, Israel
EULER-ADAS: Energy-Efficient & SIMD-Unified Logarithmic-Posit Engine for Precision-Reconfigurable Approximate ADAS Acceleration
May 7, 2026Mukul Lokhande, Ratko Pilipovic, Omkar Kokane +2Energy-Efficient ML FPGA-Based Neural Network Acceleration
NSDCS Research Group, Dept. of Electrical Engineering, Indian Institute of Technology Indore, Indore, India · Faculty of Computer and Information Science, University of Ljubljana, Ljubljana, Slovenia · EnICS Labs, Bar-Ilan Univ., Ramat Gan 5290002, Israel
PoTAcc: A Pipeline for End-to-End Acceleration of Power-of-Two Quantized DNNs
May 7, 2026Rappy Saha, Jude Haris, Nicolas Bohm Agostini +2Efficient Neural Network Inference FPGA-Based Neural Network Acceleration
LLM-Driven Design Space Exploration of FPGA-based Accelerators
May 7, 2026Vinamra Sharma, Xingjian Fu, Jude Haris +1Large Language Model-Guided Optimization Electronic Design Automation
School of Computing Science, University of Glasgow, Scotland, UK
Resource Utilization of Differentiable Logic Gate Networks Deployed on FPGAs
May 4, 2026Stephen Wormald, Gilon Kravatsky, Damon Woodard +1Efficient Neural Network Inference Edge ML
Florida Institute of National Security University of Florida Gainesville, Florida, USA
ViM-Q: Scalable Algorithm-Hardware Co-Design for Vision Mamba Model Inference on FPGA
May 3, 2026Shengzhe Lyu, Yuhan She, Patrick S. Y. Hung +2Efficient Neural Network Inference Edge Inference
City University of Hong Kong, Hong Kong
SwiftChannel: Algorithm-Hardware Co-Design for Deep Learning-Based 5G Channel Estimation
May 3, 2026Shengzhe Lyu, Yuhan She, Di Duan +5Wireless Communications Hardware-Software Co-Design
Department of Computer Science, City University of Hong Kong, Hong Kong · Department of Electrical Engineering, City University of Hong Kong, Hong Kong · Department of Information Engineering, The Chinese University of Hong Kong, Hong Kong +2
Tempus: A Temporally Scalable Resource-Invariant GEMM Streaming Framework for Versal AI Edge
May 1, 2026M. Grailoo, J. Núñez-YáñezLLM Inference Acceleration FPGA Acceleration
∗Linköping University, Sweden · †Universidad Politecnica de Madrid, Spain
NeuroRing: Scaling Spiking Neural Networks via Multi-FPGA Bidirectional Ring Topologies and Stream-Dataflow Architectures
Apr 30, 2026Muhammad Ihsan Al Hafiz, Artur PodobasSpiking Neural Networks Neuromorphic Computing
KTH Royal Institute of Technology, Stockholm, Sweden
At the Edge of the Heart: ULP FPGA-Based CNN for On-Device Cardiac Feature Extraction in Smart Health Sensors for Astronauts
Apr 28, 2026Kazi Mohammad Abidur Rahman, Davis Rakhshan, Philipp Lütke +2Time Series Classification Wearable Health Monitoring
Smart Sensors Group, Hamburg University of Technology, Hamburg, Germany · Distributed Systems, Kiel University, Kiel, Germany · Networked Cyber-Physical Systems, Hamburg University of Technology, Hamburg, Germany
A Multiplication-Free Spike-Time Learning Algorithm and its Efficient FPGA Implementation for On-Chip SNN Training
Apr 25, 2026Maryam Mirsadeghi, Mojtaba Mirbagheri, Saeed Reza KheradpishehSpiking Neural Networks Edge ML
Maryam Mirsadeghi, Mojtaba Mirbagheri, Saeed Reza Kheradpisheh
HGQ-LUT: Fast LUT-Aware Training and Efficient Architectures for DNN Inference
Apr 24, 2026Chang Sun, Zhiqiang Que, Bakhtiar Zadeh +4Efficient Neural Network Inference FPGA-Based Neural Network Acceleration
California Institute of Technology, Pasadena, CA, USA · University of Bristol, UK · Imperial College London, UK +1
Algorithm and Hardware Co-Design for Efficient Complex-Valued Uncertainty Estimation
Apr 21, 2026Zehuan Zhang, Mark Chen, He Li +1Bayesian Neural Networks Uncertainty Quantification
Department of Computing, Imperial College London · 2Southeast University
Design Rules for Extreme-Edge Scientific Computing on AI Engines
Apr 21, 2026Zhenghua Ma, G Abarajithan, Dimitrios Danopoulos +3Scientific ML Edge ML
University of California San Diego, La Jolla, CA, USA · European Organization for Nuclear Research (CERN), Geneva, Switzerland
AI-Enabled Covert Channel Detection in RF Receiver Architectures
Apr 16, 2026Abdelrahman Emad Abdelazim, Alan Rodrigo Diaz-Rizo, Hassan Aboushady +1Cybersecurity Convolutional Neural Networks
Sorbonne Universit´e, CNRS, LIP6, Paris, France
Bitwise Systolic Array Architecture for Runtime-Reconfigurable Multi-precision Quantized Multiplication on Hardware Accelerators
Feb 26, 2026Yuhao Liu, Salim Ullah, Akash KumarMixed-Precision Quantization FPGA-Based Neural Network Acceleration
Dresden University of Technology, Germany · Center for Scalable Data Analytics and Artificial Intelligence (ScaDS.AI Dresden/Leipzig), Germany · Ruhr University Bochum, Germany
BitLogic: Training Framework for Gradient-Based FPGA-Native Neural Networks
Feb 7, 2026Simon Bührer, Andreas Plesner, Aczel Till +1Efficient Neural Network Inference FPGA-Based Neural Network Acceleration
ETH Zurich · Zurich, Switzerland
SparsePixels: Efficient Convolution for Sparse Data on FPGAs
Dec 5, 2025Ho Fung Tsoi, Dylan Rankin, Vladimir Loncar +1Efficient Neural Network Inference Convolutional Neural Networks
University of Pennsylvania, USA · Institute of Physics Belgrade, Serbia · 3Massachusetts Institute of Technology, USA +1

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Feasibility of Time-Domain DNN-Based Speech Enhancement on Embedded FPGA for Hearing Aid

Feyisayo Olalere, Umut Altin, Kiki van der Heijden, Marcel van Gerven

Radboud University, Donders Institute for Brain, Cognition, and Behaviour, The Netherlands · Mortimer B. Zuckerman Mind, Brain, Behavior Institute, Columbia University, USA.

Efficient Neural Network Inference Speech Processing Speech Enhancement FPGA-Based Neural Network Acceleration Speech Separation On-Device Inference

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Hearing aids impose strict latency and power constraints that current DNN-based speech enhancement systems struggle to meet on embedded hardware. We characterize this gap by deploying both speech separation and denoising using the lightweight SuDoRM-RF++ architecture on the AMD-Xilinx Kria KV260, evaluated at FP32 and 16-bit fixed-point precision for each task. Across these configurations, first-sample latency tracks with on-chip parameter caching rather than arithmetic throughput, identifying data movement as the primary bottleneck. Precision reduction halves the model memory footprint without compromising objective speech quality. The fixed-point denoising accelerator achieves a first-sample latency of 9.7~~ms, meeting the 10~~ms clinical threshold, while speech separation reaches 16.0~ms. These measurements establish concrete resource requirements for embedded DNN-based speech enhancement and quantify the remaining gap to hearing aid deployment.

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