Electronic Design Automation

Also known as EDA

Overview

Electronic Design Automation (EDA) develops tools for turning hardware specifications into circuits, chip layouts, and printed circuit boards, then checking that designs work and meet constraints such as timing, power, area, and manufacturability. Traditional methods include logic synthesis, formal verification, physical-design heuristics, and circuit simulation; newer work adds graph neural networks, surrogate models, Bayesian optimization, and reinforcement learning to predict results or explore designs with fewer costly evaluations. Large language models are increasingly used to generate and repair RTL, create testbenches, and coordinate multi-step workflows with synthesis, simulation, and layout tools. A central challenge is ensuring that gains measured with proxies or on small benchmarks survive full tool flows and sign-off checks, especially for complex designs and long-running agent workflows.

Latest papers

CardsList

215 papers36 papers in the last four weeks, up 112% on the four weeks before. 0.2% of all new papers.

  1. LLM-Driven Design Space Exploration of FPGA-based Accelerators

    May 7, 2026Vinamra Sharma, Xingjian Fu, Jude Haris +1Large Language Model-Guided OptimizationElectronic Design Automation

  2. AMSnet-q: Unsupervised Circuit Identification and Performance Labeling for AMS Circuits

    May 2, 2026Ze Zhang, Junzhuo Zhou, Yichen Shi +6Electronic Design Automation

  3. DiagramNet: An End-to-End Recognition Framework and Dataset for Non-Standard System-Level Diagrams

    May 2, 2026Jincheng Lou, Ruohan Xu, Jiapeng Li +6Multi-Agent LLM SystemsElectronic Design Automation

  4. RuC: HDL-Agnostic Rule Completion Benchmark Generation

    Apr 30, 2026Arnau Ayguadé Domingo, Miquel Alberti-Binimelis, Cristian Gutierrez-Gomez +5LLM EvaluationLLM Prompting

  5. HAVEN: Hybrid Automated Verification ENgine for UVM Testbench Synthesis with LLMs

    Apr 30, 2026Chang-Chih Meng, Yu-Ren Lu, Guan-Yu Lin +3Electronic Design AutomationLLM-Based Program Synthesis

  6. MappingEvolve: LLM-Driven Code Evolution for Technology Mapping

    Apr 29, 2026Rongliang Fu, Yi Liu, Qiang Xu +1Evolutionary OptimizationLarge Language Model-Guided Optimization

  7. How Can Reinforcement Learning Achieve Expert-level Placement?

    Apr 28, 2026Ruo-Tong Chen, Ke Xue, Chengrui Gao +7Reinforcement LearningElectronic Design Automation

  8. RefEvo: Agentic Design with Co-Evolutionary Verification for Agile Reference Model Generation

    Apr 27, 2026Yifan Zhang, Jianmin Ye, Jiahao Yang +1Electronic Design AutomationLLM-Based Program Synthesis

  9. FlowPlace: Flow Matching for Chip Placement

    Apr 26, 2026Peng Xie, Ke Xue, Yunqi Shi +6Constrained Generative ModelingFlow Matching

  10. TimingLLM: A Two-Stage Retrieval-Augmented Framework for Pre-Synthesis Timing Prediction from Verilog

    Apr 26, 2026Armin Abdollahi, Negin Ashrafi, Mehdi Kamal +1Retrieval-Augmented GenerationElectronic Design Automation

  11. LEGO: An LLM Skill-Based Front-End Design Generation Platform

    Apr 25, 2026Jincheng Lou, Ruohan Xu, Jiecheng Ma +3Electronic Design AutomationCode Generation

  12. AnalogRetriever: Learning Cross-Modal Representations for Analog Circuit Retrieval

    Apr 25, 2026Yihan Wang, Lei Li, Yao Lai +2Cross-Modal Representation LearningElectronic Design Automation

  13. Silicon Aware Neural Networks

    Apr 21, 2026Sebastian Fieldhouse, Kea-Tiong TangEfficient Neural Network InferenceEnergy-Efficient ML

  14. A PPA-Driven 3D-IC Partitioning Selection Framework with Surrogate Models

    Apr 20, 2026Shang Wang, Shuai Liu, Owen Randall +1Surrogate-Assisted OptimizationElectronic Design Automation

  15. AutoPPA: Automated Circuit PPA Optimization via Contrastive Code-based Rule Library Learning

    Apr 20, 2026Chongxiao Li, Pengwei Jin, Di Huang +14Electronic Design Automation

  16. Configuration Over Selection: Hyperparameter Sensitivity Exceeds Model Differences in Open-Source LLMs for RTL Generation

    Apr 18, 2026Minghao Shao, Zeng Wang, Weimin Fu +5LLM EvaluationLanguage Model Generation Evaluation

  17. Autonomous Evolution of EDA Tools: Multi-Agent Self-Evolved ABC

    Apr 16, 2026Cunxi Yu, Haoxing RenElectronic Design AutomationAutomated Software Engineering

  18. HWE-Bench: Benchmarking LLM Agents on Real-World Hardware Bug Repair Tasks

    Apr 16, 2026Fan Cui, Hongyuan Hou, Zizhang Luo +2Automated Program RepairElectronic Design Automation

  19. TOPCELL: Topology Optimization of Standard Cell via LLMs

    Apr 15, 2026Zhan Song, Yu-Tung Liu, Chen Chen +6Topology OptimizationElectronic Design Automation

  20. From Equations to Algorithms and Data: Transforming Microwave Engineering and Education with Machine Learning

    Apr 13, 2026Mehmet Parlak, Islam GuvenElectronic Design AutomationInverse Design

  21. CapBench: A Multi-PDK Dataset for Machine-Learning-Based Post-Layout Capacitance Extraction

    Apr 13, 2026Hector R. Rodriguez, Jiechen Huang, Wenjian YuElectronic Design Automation

  22. AutoFlows++: Hierarchical Message Flow Mining for System on Chip Designs

    Apr 12, 2026Bardia Nadimi, Hao ZhengElectronic Design AutomationProcess Mining

  23. GIF: A Conditional Multimodal Generative Framework for IR Drop Imaging in Chip Layouts

    Apr 11, 2026Kiran Thorat, Nicole Meng, Mostafa Karami +3Electronic Design AutomationConditional Generative Modeling

  24. DiffHLS: Differential Learning for High-Level Synthesis QoR Prediction with GNNs and LLM Code Embeddings

    Apr 10, 2026Zedong Peng, Zeju Li, Qiang Xu +1Electronic Design Automation

  25. R2G: A Multi-View Circuit Graph Benchmark Suite from RTL to GDSII

    Apr 9, 2026Zewei Zhou, Jiajun Zou, Jiajia Zhang +8Electronic Design AutomationGraph Neural Networks

  26. A Self-Calibrating Framework for Analog Circuit Sizing Using LLM-Derived Analytical Equations

    Apr 8, 2026Antonio J. Bujana, Aydin I. KarsilayanElectronic Design AutomationAnalog Circuit Sizing