Electronic Design Automation

Also known as EDA

Overview

Electronic Design Automation (EDA) develops tools for turning hardware specifications into circuits, chip layouts, and printed circuit boards, then checking that designs work and meet constraints such as timing, power, area, and manufacturability. Traditional methods include logic synthesis, formal verification, physical-design heuristics, and circuit simulation; newer work adds graph neural networks, surrogate models, Bayesian optimization, and reinforcement learning to predict results or explore designs with fewer costly evaluations. Large language models are increasingly used to generate and repair RTL, create testbenches, and coordinate multi-step workflows with synthesis, simulation, and layout tools. A central challenge is ensuring that gains measured with proxies or on small benchmarks survive full tool flows and sign-off checks, especially for complex designs and long-running agent workflows.

Latest papers

CardsList

214 papers35 papers in the last four weeks, up 106% on the four weeks before. 0.2% of all new papers.

  1. AnalogScout: Simulation-Efficient PVT-Aware Analog Sizing with LLM Agents

    Oct 27, 2026Yichen Long, Keren ZhuAnalog Circuit SizingElectronic Design Automation

  2. End-to-End Neural Modeling of EM Response and Design Performance for Free-Form RFIC Passives

    Oct 25, 2026Yuhao Mao, Chenhao Chu, Martin Vechev +1Neural Surrogate ModelingSurrogate Modeling

  3. TACS-RF: Tool-driven Agentic Circuit Synthesis of RF and mmWave Modules

    Oct 22, 2026Tristan Liang, Aravind NaguluTool-Using AgentsElectronic Design Automation

  4. NN-Based Transistor Modeling for Ultra-Fast SPICE Simulation and Standard Cell Library Characterization

    Oct 22, 2026Rodion Novkin, Hussam AmrouchNeural Surrogate ModelingElectronic Design Automation

  5. Sketch2Sim: an end-to-end modular framework for hand-drawn circuit analysis

    Oct 20, 2026Mohammad Kawsar, Al Amin Islam Ridoy, Md Rakib Hossain +4Electronic Design AutomationDocument Image Understanding

  6. VHDLBench: Benchmarking and Fine-Tuning Large Language Models for VHDL-Based Chip Design

    Oct 19, 2026Patrik Drazic, Benaoumeur Senouci, Boualem BenatallahElectronic Design AutomationCode Generation

  7. Pareto-Optimal RTL Code Generation via Multi-Objective Reinforcement Learning with Large Language Models

    Oct 16, 2026Koki Takeshita, Kenji Uebayashi, Hikaru Tomonari +6RTL Code GenerationElectronic Design Automation

  8. Who Plans, Who Edits? Verified, Cost-Aware Division of Labor for LLM-Driven Analog Layout Repair

    Oct 16, 2026Xilai Dai, Saeed MohammadiLLM AgentsElectronic Design Automation

  9. GNN-Guided Local Refinement for Efficient Layout Decomposition with DSA-MP

    Oct 15, 2026Yu Feng, Liyi Zhou, Haoyu Wang +5Semiconductor ManufacturingElectronic Design Automation

  10. LOADBench: A Large Open Analog Dataset and Benchmark for Machine Learning in IC Design

    Oct 15, 2026M. Leibl, F. Azevedo, S. Uhlich +7Electronic Design AutomationBenchmark Design

  11. HGRP: Heterogeneous Graph Neural Network for Routability Prediction

    Oct 14, 2026Yule Sheng, Yue Yuan, Shan Shen +1Electronic Design AutomationHeterogeneous GNNs

  12. LATCH: LLM-Assisted Timing Closure Harness for Post-Route FPGA Optimisation

    Oct 12, 2026Shu Gu, Matthew Youngman, Yuqin Zhao +5Electronic Design AutomationLarge Language Model-Guided Optimization

  13. LLM-Augmented Bayesian Optimization with Adaptive Policies for Chiplet Design Space Exploration

    Oct 10, 2026Hang Liu, Zhengfei Chen, Zhengrui Chen +3Large Language Model-Guided OptimizationElectronic Design Automation

  14. RFChipAgent: Multi-Agentic AI Flow for Analog/RF Chip Design

    Oct 7, 2026Awani Khodkumbhe, Yunfei Feng, Raj Rangarajan +2Electronic Design AutomationAnalog Circuit Sizing

  15. When Algorithmic Exploration Becomes Cheap: A Case Study of Agentic Research in EDA

    Oct 7, 2026Keren Zhu, Yu Deng, Xiaoyu Hao +6AI-Assisted Scientific ResearchAutonomous Research Agents

  16. CircuitGate: Logic-Consistent Circuit-Level Functional Modeling for And-Inverter Graphs

    Oct 7, 2026Qifan Zhang, Ruijie Li, Fangzhou Zhang +6Electronic Design AutomationGraph Representation Learning

  17. From Chunks to Functional Evidence: Function-Aware Retrieval for EDA Documentation QA

    Oct 7, 2026Xiaotian Qiu, Kairui Liu, Shi Chenyi +3Evidence RetrievalRetrieval-Augmented Generation

  18. 2d-fet-bench: from spatial reasoning to fet design on flakes

    Oct 5, 2026Dunzhi Zhou, Chengyu Zhu, Gang Qiu +1Benchmark DesignElectronic Design Automation

  19. Agentic Design Space Exploration for Joint Hardware Configuration Selection and Mapping of AI Inference Workloads on Heterogeneous Edge SoCs

    Oct 5, 2026Geetha Prasuna Yarramneni, Surya Selvam, Wilfried Haensch +1Hardware-Software Co-DesignElectronic Design Automation

  20. Back to the Future: Rethinking EDA Infrastructure for Agentic Systems in Chip Design Verification

    Oct 5, 2026Je Yang, Ivan Lobov, Thomas KarpatiElectronic Design AutomationLLM Agent Orchestration

  21. Climbing the Design Ladder: Sequential Knowledge Distillation for Early-Stage Circuit Timing Prediction

    Oct 5, 2026Reza Moravej, Fahad Rahman Amik, Zhanguang Zhang +2Electronic Design AutomationKnowledge Distillation

  22. GPlaceRL: An Open-Source Graph Reinforcement Learning Framework for Detailed Placement

    Oct 5, 2026Pavlos Stoikos, Foteini Oikonomou, Christos Poulos +5Reinforcement LearningElectronic Design Automation

  23. RollPlace: Improving Macro Placement via Monte Carlo Rollout Search

    Oct 5, 2026Qi Zhou, Guojun Liu, Guangzhi Qi +5Macro PlacementElectronic Design Automation

  24. Reinforcement Learning-Based Optimization of Workload-Aware Power Delivery Networks

    Oct 5, 2026Oran Hayes, Maria Pantazi-Kypraiou, Athanasios Tziouvaras +4Electronic Design AutomationRL for Combinatorial Optimization

  25. Trinity: One Differentiable Physics for Training, Refining and Scoring Generative Floorplanners

    Oct 4, 2026Shih-Ying Yeh, Tzu-Sian Wang, Xuehai Wang +7Floor Plan GenerationElectronic Design Automation

  26. An Executable Benchmark for LLM-Based HLS Repair:Design Complexity and Repair Underconstraint

    Oct 2, 2026Maisha Mastora, Dean SullivanAutomated Program RepairElectronic Design Automation

  27. A Composable AI-Accelerated Iterative Solver for 3D-IC Thermal Modeling

    Oct 1, 2026Yixing Li, Jiahang Zhou, Zhiyu Zeng +1Domain Decomposition MethodsElectronic Design Automation