Electronic Design Automation

Also known as EDA

Overview

Electronic Design Automation (EDA) develops tools for turning hardware specifications into circuits, chip layouts, and printed circuit boards, then checking that designs work and meet constraints such as timing, power, area, and manufacturability. Traditional methods include logic synthesis, formal verification, physical-design heuristics, and circuit simulation; newer work adds graph neural networks, surrogate models, Bayesian optimization, and reinforcement learning to predict results or explore designs with fewer costly evaluations. Large language models are increasingly used to generate and repair RTL, create testbenches, and coordinate multi-step workflows with synthesis, simulation, and layout tools. A central challenge is ensuring that gains measured with proxies or on small benchmarks survive full tool flows and sign-off checks, especially for complex designs and long-running agent workflows.

Latest papers

CardsList

215 papers36 papers in the last four weeks, up 112% on the four weeks before. 0.2% of all new papers.

  1. EvoDRC: A Self-Evolving Agentic Framework for Automated DRC Violation Repair

    Jul 22, 2026Bing-Yue Wu, Chia-Tung Ho, Haoyu Yang +2Electronic Design AutomationLLM Agents

  2. AlphaRoute: Large Language Models as Semantic Optimizers for Multi-Objective Routing

    Jul 22, 2026Kabir Murjani, Mishri Bhavsar, Manish I. Patel +1Automated Heuristic DesignLarge Language Model-Guided Optimization

  3. Symbol and Footprint Database for Electronic Components by Agentic Recognition and Generation

    Jul 22, 2026Yichen Shi, Yuzhi Liu, Zhuofu Tao +4Electronic Design Automation

  4. RF-Agent: A Practical Framework for Building Language Agents for RFIC Design

    Jul 21, 2026Yueqi Xing, Houbo He, Jolie Wang +5Retrieval-Augmented GenerationLLM Fine-Tuning

  5. Can AI Agents Really Complete RTL-to-GDS? Lessons from Benchmarking Tool-Interactive EDA Workflows

    Jul 20, 2026Jinyuan Deng, Zhengrui Chen, Xufeng Wei +4Electronic Design AutomationLLM Agent Evaluation

  6. CoEvoP&R: Co-Evolving Placement Objectives with Routing Feedback via Large Language Models

    Jul 19, 2026Ruogu Chen, Weihua Xiao, Ramesh Karri +1Automated Heuristic DesignLarge Language Model-Guided Optimization

  7. When LLMs Over-Answer: Measuring and Mitigating Quality Issues in LLM-Based Hardware Description Language Question Answering

    Jul 19, 2026Ziteng Hu, Jiachi Chen, Wenhao Lv +2LLM EvaluationElectronic Design Automation

  8. CLOSER-Bench: Evaluating Budgeted Cross-Stage Design Closure for Hardware Agents

    Jul 18, 2026Peilong Zhou, Zhirong Chen, Cangyuan Li +4Benchmark DesignElectronic Design Automation

  9. RTL-Sequencer: Towards Scalable RTL Timing Prediction with the Sequence-based Paradigm

    Jul 17, 2026Ziyan Guo, Wenji Fang, Wenkai Li +3Electronic Design AutomationSequence Modeling

  10. SPECS: Speciated Evolutionary Circuit Synthesis

    Jul 15, 2026Yağız Gençer, Stefan Uhlich, Andrea Bonetti +3Topology OptimizationElectronic Design Automation

  11. Lighthouse RL: Sample-Efficient Circuit Optimization via Strategic Reset Points

    Jul 15, 2026Mustafa Emre Gürsoy, Stefan Uhlich, Ryoga Matsuo +6Reinforcement LearningBlack-Box Optimization

  12. Towards Reliable AI-Assisted Analog Design: Template-Constrained LLM Agents for SAR ADC Generation

    Jul 15, 2026Dimple Vijay Kochar, Hae-Seung Lee, Anantha P. ChandrakasanElectronic Design AutomationLLM Agents

  13. EXPLORE: Exploration with Guided Search for Analog Topology Generation using Language Models

    Jul 15, 2026Guanglei Zhou, Chen-Chia Chang, Yikang Shen +5Large Language Model-Guided OptimizationElectronic Design Automation

  14. AutoVSR: Automatic Visual-to-Symbolic Reasoning for Symbolic Expression Generation from Circuit Schematic

    Jul 13, 2026Zhe Xiao, Longfei Li, Xu He +3Electronic Design AutomationVLM Reasoning

  15. LLM for EDA in Front-End Design: Challenges and Opportunities

    Jul 10, 2026Kangwei Xu, Bing Li, Ulf SchlichtmannElectronic Design Automation

  16. PCBWorld: A Benchmark Environment for Engine-Grounded PCB Design Automation

    Jul 7, 2026Hyungseok Song, Junseok Park, Won-Seok Choi +4Electronic Design AutomationAI Agent Benchmarks

  17. SMART: A Machine Learning and Monte Carlo Framework for Rapid Analysis of Stochastic Transistor Aging and Process Variation in Digital Circuits

    Jul 6, 2026Arash Esshaghi, Siavash Es'haghi, Gholamreza Shahabadi +1Surrogate ModelingElectronic Design Automation

  18. AgenticPD: A Stage-Aware Agentic Framework for Physical Design QoR Optimization

    Jul 6, 2026Shuo Ren, Zijin Cheng, Yaohui Han +7Large Language Model-Guided OptimizationElectronic Design Automation

  19. Weave: Verified Netlist-to-Schematic Conversion via Layered Graph Layout

    Jul 4, 2026Senol GulgonulElectronic Design Automation

  20. OmniLayout: A Schematic-Coupled Multimodal Benchmark for Constraint-Aware Geometric Reasoning in PCB Layout

    Jul 3, 2026Taiting Lu, Kaiyuan Lin, Mingjia Wang +12Electronic Design AutomationSpatial Reasoning

  21. SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligence

    Jul 2, 2026Saoud Aldowaish, Yashwanth Karumanchi, Kai-Chen Chiang +4Electronic Design AutomationDocument Image Understanding

  22. Agentic Hardware Design as Repository-Level Code Evolution

    Jun 26, 2026Cunxi Yu, Chenhui Deng, Nathaniel Pinckney +1Software EngineeringElectronic Design Automation

  23. VeriPilot: An LLM-Powered Verilog Debugging Framework

    Jun 22, 2026Yihan Wang, Cheng Liu, Jiazheng Zhang +4Automated Program RepairElectronic Design Automation

  24. AgentDSE: Reasoning-Augmented Architectural Design Space Exploration

    Jun 20, 2026Chenyu Wang, Jiahe Caroline Shi, David Kong +4Large Language Model-Guided OptimizationElectronic Design Automation

  25. Agentic Electronic Design Automation: A Handoff Perspective

    Jun 18, 2026Jiawei Liu, Peiyi Han, Yuntao Lu +3Agent Communication ProtocolsElectronic Design Automation

  26. Deep-Learning-Based Pixelated Microwave Filter Design and Characterization using Electro-Optical Electric-Field Measurements

    Jun 16, 2026Han Zhou, Richard Bannister, Caspar Pierce +9Electronic Design AutomationInverse Design

  27. AUTOGATE: Automated Clock Gating via Toggling-Aware LLM-based RTL Rewriting

    Jun 16, 2026Yiting Wang, Chenhui Deng, Chia-Tung Ho +6Large Language Model-Guided OptimizationElectronic Design Automation

  28. Surrogate-Assisted Framework for SI-Compliant Interconnect Design Optimization Using the Earth Mover's Distance

    Jun 13, 2026Emre Ecik, Werner John, Julian Withöft +2Surrogate-Assisted OptimizationElectronic Design Automation