Electronic Design Automation

Also known as EDA

Overview

Electronic Design Automation (EDA) develops tools for turning hardware specifications into circuits, chip layouts, and printed circuit boards, then checking that designs work and meet constraints such as timing, power, area, and manufacturability. Traditional methods include logic synthesis, formal verification, physical-design heuristics, and circuit simulation; newer work adds graph neural networks, surrogate models, Bayesian optimization, and reinforcement learning to predict results or explore designs with fewer costly evaluations. Large language models are increasingly used to generate and repair RTL, create testbenches, and coordinate multi-step workflows with synthesis, simulation, and layout tools. A central challenge is ensuring that gains measured with proxies or on small benchmarks survive full tool flows and sign-off checks, especially for complex designs and long-running agent workflows.

Latest papers

CardsList

215 papers36 papers in the last four weeks, up 112% on the four weeks before. 0.2% of all new papers.

  1. OmniSch: A Multimodal PCB Schematic Benchmark For Structured Diagram Visual Reasoning

    Mar 31, 2026Taiting Lu, Kaiyuan Lin, Yuxin Tian +13Spatial Reasoning BenchmarksMultimodal Model Evaluation

  2. From Physics to Surrogate Intelligence: A Unified Electro-Thermo-Optimization Framework for TSV Networks

    Mar 31, 2026Mohamed Gharib, Leonid Popryho, Inna Partin-VaisbandElectronic Design AutomationSurrogate Modeling

  3. See it to Place it: Evolving Macro Placements with Vision-Language Models

    Mar 30, 2026Ikechukwu Uchendu, Swati Goel, Karly Hou +5Macro PlacementElectronic Design Automation

  4. GSR-GNN: Training Acceleration and Memory-Saving Framework of Deep GNNs on Circuit Graph

    Mar 28, 2026Yuebo Luo, Shiyang Li, Yifei Feng +3Graph Neural NetworksMemory-Efficient Training

  5. FluxEDA: A Unified Execution Infrastructure for Stateful Agentic EDA

    Mar 26, 2026Zhengrui Chen, Zixuan Song, Yu Li +2Electronic Design AutomationLLM Agent Harnesses

  6. Can an Actor-Critic Optimization Framework Improve Analog Design?

    Mar 25, 2026Sounak Dutta, Fin Amin, Sushil Panda +3Analog Circuit SizingElectronic Design Automation

  7. KCLNet: Electrically Equivalence-Oriented Graph Representation Learning for Analog Circuits

    Mar 25, 2026Peng Xu, Yapeng Li, Tinghuan Chen +2Representation LearningGraph Representation Learning

  8. AnalogAgent: Self-Improving Analog Circuit Design Automation with LLM Agents

    Mar 25, 2026Zhixuan Bao, Zhuoyi Lin, Jiageng Wang +5Electronic Design AutomationLLM Agent Self-Improvement

  9. Causal AI For AMS Circuit Design: Interpretable Parameter Effects Analysis

    Mar 24, 2026Mohyeu Hussain, David Koblah, Reiner Dizon-Paradis +1Electronic Design AutomationCausal Interpretability

  10. Exploring the Agentic Frontier of Verilog Code Generation

    Mar 19, 2026Patrick Yubeaton, Siddharth Garg, Chinmay HegdeCode GenerationAgentic Code Generation

  11. VeriAgent: A Tool-Integrated Multi-Agent System with Evolving Memory for PPA-Aware RTL Code Generation

    Mar 18, 2026Yaoxiang Wang, Qi Shi, ShangZhan Li +6RTL Code GenerationElectronic Design Automation

  12. GUIDE: GenAI Units In Digital Design Education

    Mar 18, 2026Weihua Xiao, Jason Blocklove, Matthew DeLorenzo +6Computer Science EducationGenerative AI in Education

  13. CODMAS: A Dialectic Multi-Agent Collaborative Framework for Structured RTL Optimization

    Mar 17, 2026Che-Ming Chang, Prashanth Vijayaraghavan, Ashutosh Jadhav +4Electronic Design AutomationRTL Code Generation

  14. ODIN-Based CPU-GPU Architecture with Replay-Driven Simulation and Emulation

    Mar 17, 2026Nij Dorairaj, Debabrata Chatterjee, Hong Wang +8Electronic Design Automation

  15. DRCY: Agentic Hardware Design Reviews

    Mar 13, 2026Kyle Dumont, Nicholas Herbert, Hayder Tirmazi +1Electronic Design AutomationLLM Agents

  16. OpenACMv2: An Accuracy-Constrained Co-Optimization Framework for Approximate DCiM

    Mar 13, 2026Yiqi Zhou, Yue Yuan, Yikai Wang +8Compute-in-MemoryApproximate Computing

  17. VeriHGN: Heterogeneous Graph-Based Congestion Prediction for Chip Layout Verification

    Mar 10, 2026Runbang Hu, Bo Fang, Bingzhe Li +1Electronic Design AutomationHeterogeneous GNNs

  18. Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL

    Mar 10, 2026Siyang Cai, Cangyuan Li, Haoyu Gao +3Representation LearningElectronic Design Automation

  19. Advancing Automated Algorithm Design via Evolutionary Stagewise Design with LLMs

    Mar 9, 2026Chen Lu, Ke Xue, Chengrui Gao +5Automated Algorithm DiscoveryAutomated Heuristic Design

  20. SoberDSE: Sample-Efficient Design Space Exploration via Learning-Based Algorithm Selection

    Mar 1, 2026Lei Xu, Shanshan Wang, Chenglong XiaoElectronic Design AutomationAlgorithm Selection

  21. RTLocating: Intent-aware RTL Localization for Hardware Design Iteration

    Feb 28, 2026Changwen Xing, Yanfeng Lu, Lei Qi +5Electronic Design Automation

  22. Component Centric Placement Using Deep Reinforcement Learning

    Feb 26, 2026Kart Leong LimElectronic Design AutomationRL for Combinatorial Optimization

  23. EvolveGen: Algorithmic Level Hardware Model Checking Benchmark Generation through Reinforcement Learning

    Feb 26, 2026Guangyu Hu, Xiaofeng Zhou, Wei Zhang +1Synthetic Benchmark GenerationFormal Hardware Verification

  24. CTS-Bench: Benchmarking Graph Coarsening Trade-offs for GNNs in Clock Tree Synthesis

    Feb 22, 2026Barsat Khadka, Kawsher Roxy, Md Rubel AhmedGraph CoarseningElectronic Design Automation

  25. Alpha-RF: Automated RF-Filter-Circuit Design with Neural Simulator and Reinforcement Learning

    Feb 18, 2026Nhat Tran, Chenjie Hao, Alexander Stameroff +2Electronic Design AutomationNeural Surrogate Modeling